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computers / alt.comp.hardware.pc-homebuilt / Re: DDR5 voltage requirements for 4 sticks ?

SubjectAuthor
* Re: DDR5 voltage requirements for 4 sticks ?Paul
+- Re: DDR5 voltage requirements for 4 sticks ?Paul
`* Re: DDR5 voltage requirements for 4 sticks ?Woozy Song
 `- Re: DDR5 voltage requirements for 4 sticks ?Paul

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Re: DDR5 voltage requirements for 4 sticks ?

<u2h4bv$2i5sh$1@dont-email.me>

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From: nos...@needed.invalid (Paul)
Newsgroups: alt.comp.hardware.pc-homebuilt
Subject: Re: DDR5 voltage requirements for 4 sticks ?
Date: Fri, 28 Apr 2023 14:47:26 -0400
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 by: Paul - Fri, 28 Apr 2023 18:47 UTC

On 4/28/2023 11:32 AM, Skybuck Flying wrote:
> This is an interesting video:
>
> https://www.youtube.com/watch?v=Od5NNwfTZso
>
> At 14:25 he explains the memory controller needs to send more voltage to the RAM sticks if EXPO is enabled.
>
> I intend to run with EXPO disabled for safety, but I also intend to run 4 sticks instead of 2 sticks.
>
> (Ryzen 9 7950x 3D processor).
>
> My question is:
>
> 1. Will running 4 sticks of DDR5 ram (4x32 GB) require MORE or LESS voltage from the processor/chip/memory controller ?!
>
> The four memory sticks I have are:
>
> Corsair Dominator Platinum RGB CMT64GX5M2B6000Z40
>
> They seem to range in voltage from DDR5 standard 1.1 volts to 1.35 or 1.4 volts ?!
>
> Now there is speak of limiting the processor to not output more than 1.3 volts to the memory via bios/firmware update ?!?
>
> As far as I understand running DDR5 faster/overclocking/expo (6000 MHz) requires more volts... running 4 sticks would need to run at 3600 MHz... so theoretically less speed so less voltage ?! But on the other hand more sticks ?!? Does this mean more volts ?! ;) :) (I would guess not, but not sure)
>
> Bye for now,
> Skybuck.
>

https://en.wikipedia.org/wiki/DDR5_SDRAM

Voltage 1.1 V nominal (actual levels are regulated by on-the-module regulators) <=== VCore

UDIMMs use 5V input. DDR5 DIMMs are supplied with management interface power at 3.3V
and use on-board circuitry (PMIC) to convert to the lower voltage required by the memory chips.
Final voltage regulation close to the point of use provides more stable power, and mirrors
the development of voltage regulator modules for CPU power supplies.

I get the impression the PMIC on the DIMM, is tied to SMBUS or similar,
and that makes it programmable. That's how you can get 1.4V when the PMIC
should really be supplying 1.1V.

As for the notion that the chips are getting hot on the DIMM,
in the past ISSCC papers about RAM mention the usage of regulators
inside the chip. This means, when you overvolt the RAM, those
regulators would get hotter (wasted power). And if you crank the clock rate,
the toggle power contribution should go up. RAM is generally high
power during read and write, except the duty cycle (how many cycles
from 100 cycles, where the high power cycles are present), is not
all that high.

Reddit is full of rubbish on the subject, but I can't find a
good primer at the moment.

https://www.computerbase.de/forum/threads/some-say-that-ddr5-consumes-less-power-but-does-that-hold-true-in-practice.2131507/

The thing about chip voltages, is you have to watch out for
internal regulators, and you have to watch out for parasitic
diode behavior between voltages like VDD and VDDQ. If the voltage
difference is too high, currents can flow where they were
not intended to flow. The person designing the memory chip,
is working with an assumption of 1.1V, and that person would never
suspect the voltage would rise high enough to enable diode conduction
behavior in a substrate.

Google no longer gives me hits for private enthusiast sites, and
was giving me "nothing but Reddit". Which isn't healthy.

The bus communication, uses pad drivers on either side.
The data bus is bidirectional. The voltages the things use,
depending on the driver type, should be the same, yet the Reddit
seems to make them different.

VDD(C0re) VDDQ(IO) VDD2(IO)???
| | |
+--+-----------+--+ +----
| Memory | Data(n) |
| Chip +--------------------+
| | |
+-----------------+ +----

Until I can find an actual technical web page, it's
pretty hard to tell how much of the Reddit advice
is bad advice. Generally, if chips get hot, when
you know the technology should be getting cooler,
this is an indication we're not doing something right :-)

As an engineer, I always apply "sanity testing" to calcs.
"Did the item catch fire ? Then the calc is probably wrong."
Like if some yoyo tells me a DIMM dissipates 25W, the
first thing I check, is whether the DIMM is on fire.
A DIMM should use around 1W, just as a ballpark figure.
And when you make statements like that, they must be
prefaced with "... using an industry standard cycle mix",
since power depends on access rates. Maybe the DIMMs
get warmer during Prime95.

Paul

Re: DDR5 voltage requirements for 4 sticks ?

<u2idn2$2rm9i$1@dont-email.me>

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From: nos...@needed.invalid (Paul)
Newsgroups: alt.comp.hardware.pc-homebuilt
Subject: Re: DDR5 voltage requirements for 4 sticks ?
Date: Sat, 29 Apr 2023 02:33:05 -0400
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 by: Paul - Sat, 29 Apr 2023 06:33 UTC

On 4/28/2023 7:03 PM, Skybuck Flying wrote:
> I need a simple answer, something dumbed down so that a noob/novice in elecronics can understand it.
>
> My understanding so far is CPU has integrated memory controller and this thing ICM can only handle 1.3 volts ?!
>
> It connects to DDR5 memory which expects wants/sucks 1.35 VOLTS ?!
>
> Would you agree with this ?!
>
> Is it possible that DDR5 memory kit is dictacting to the CPU/ICM what it wants ?!
>
> I am making a live video about this right now:
>
>
> New question:
>
> Do RGB leds on Memory Kits increase the voltage needed for DDR5 memory kits ?!
>
> Will 2 sticks require more volts than 4 sticks ? (assume 5200 MHz or 6000 MHz)
>
> Will 4 sticks require less volts than 2 sticks ? (assume 3600 MHz)
>
> I want to know if my Corsair Dominator Platinum RGB CMT64GX5M2B6000Z40 can run at all on this processor with 1.3 volt limitations applied from firmware
>
> https://www.tomshardware.com/news/agesa-1070-fixes-temperature-issues-ryzen-7000-burnout
>
> https://www.reddit.com/r/Amd/comments/12yq4yb/megathread_for_am5_ryzen_7000/
>
> https://www.tomshardware.com/news/amd-issues-follow-up-statement-on-ryzen-burnout-issues-limits-soc-voltages
>

The DIMM has its own PMIC regulator for the RAM chips and RAM I/O.

The incoming power to the DIMM is +5V, according to the Wikipedia article.
On servers the power is +12V. The PMIC regulates this down to a VDD of 1.1V .
The pump voltage VPP appears to be a supervisory voltage, rather than
part of the datapath (should not affect overclock as near as I can tell).

The RGB lighting is not tied to a PMIC output. The RGB lighting will
run itself off the +5V or other raw power rails coming into the DIMM.

RGB should have no effect on anything.

*******

https://www.wepc.com/how-to/overclock-ddr5-ram/

"Each stick of RAM is different and requires different voltages depending
on the performance. Some are rated for much higher voltages than others,
but as a general rule, we’d never suggest going over 1.5V.

The recommended voltage baselines
for different brands of memory modules are as follows:

VDD VDDQ
Hynix 1.25v 1.25V
Micron 1.25V 1.35V
Samsung 1.35V 1.35V

Leave all the rest of the settings on auto.
"

Comment section:

"DDR5 frequencies are just too high to run in Gear1 (1:1 IMC to DRAM),
let alone over 5000MT/s.

Stick to Gear2 for DDR5, try to tighten the timings,
and try to not lose much time with the memory, with current kits there
is not a lot performance to squeeze."

Once you install the new BIOS on the board, the capped voltage
may limit whether you can adjust for exotic values of such. This
means the vast majority of web page (reddit) references will now
be wrong for X3D, in the sense that the board will no longer
allow the settings mentioned by the users.

Since this is not the fault of the memory, you should still be
able to adjust the PMIC.

However, the [addr-control-databus] communications channel, both ends have
their own I/O voltage and that I/O voltage match is not arbitrary. The
Redditors seem to think a small difference between those values
is important.

The intent long ago, was not to overclock the X3D and the reason
for that was thermals. The cache sitting on top of a CCX, affects
the thermal path. The desire is to keep the power down so the
bit underneath can be cooled. That's why these changes are important.

If you switch on EXPO, what should happen with the new BIOS is
VSOC is not going to get bumped up. And the value of VSOC could
have an influence on some other CPU-side voltage setting.

Summary: situation == dynamic

Paul

Re: DDR5 voltage requirements for 4 sticks ?

<u4br40$18gg4$1@dont-email.me>

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From: suzyw...@outlook.com (Woozy Song)
Newsgroups: alt.comp.hardware.pc-homebuilt
Subject: Re: DDR5 voltage requirements for 4 sticks ?
Date: Sun, 21 May 2023 09:11:26 +0800
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In-Reply-To: <u2h4bv$2i5sh$1@dont-email.me>
 by: Woozy Song - Sun, 21 May 2023 01:11 UTC

Paul wrote:

> As an engineer, I always apply "sanity testing" to calcs.
> "Did the item catch fire ? Then the calc is probably wrong."
> Like if some yoyo tells me a DIMM dissipates 25W, the
> first thing I check, is whether the DIMM is on fire.
> A DIMM should use around 1W, just as a ballpark figure.
> And when you make statements like that, they must be
> prefaced with "... using an industry standard cycle mix",
> since power depends on access rates. Maybe the DIMMs
> get warmer during Prime95.
>
>    Paul

Item catching fire is a bit drastic.
Sounds like Asus engineers making AM5 mobos didn't notice the item
getting blisters.

Re: DDR5 voltage requirements for 4 sticks ?

<u4c0cp$1d3vn$1@dont-email.me>

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From: nos...@needed.invalid (Paul)
Newsgroups: alt.comp.hardware.pc-homebuilt
Subject: Re: DDR5 voltage requirements for 4 sticks ?
Date: Sat, 20 May 2023 22:41:28 -0400
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<u2h4bv$2i5sh$1@dont-email.me> <u4br40$18gg4$1@dont-email.me>
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 by: Paul - Sun, 21 May 2023 02:41 UTC

On 5/20/2023 9:11 PM, Woozy Song wrote:
> Paul wrote:
>
>> As an engineer, I always apply "sanity testing" to calcs.
>> "Did the item catch fire ? Then the calc is probably wrong."
>> Like if some yoyo tells me a DIMM dissipates 25W, the
>> first thing I check, is whether the DIMM is on fire.
>> A DIMM should use around 1W, just as a ballpark figure.
>> And when you make statements like that, they must be
>> prefaced with "... using an industry standard cycle mix",
>> since power depends on access rates. Maybe the DIMMs
>> get warmer during Prime95.
>>
>>     Paul
>
> Item catching fire is a bit drastic.
> Sounds like Asus engineers making AM5 mobos didn't notice the item getting blisters.

The AM5 socket, is a change for AMD. Intel has been using LGA for quite a while (LGA775).

AM4 1331 PGA Pin Grid Array, ZIF gripper per pin <=== previous generation, no problem
AM5 1718 LGA Land Grid Array, gold square pads, spring needle point socket mate

This has some consequences for the ability to burn stuff.

Accessory rails (VSOC) don't get nearly as many electrical connections
as VCore does. The person doing the contact layout, may not have
assigned enough contacts for VSOC to be overvolted and overcurrented.

The lab prototypes will have current flow stuff fitted, to check
consumption. This is essential when writing overclocking firmware
(whether overt overclocking, with the big ass numbers on the screen,
or covert operation, where the wrong voltages are used to make the
design "look better"). The lab is your chance to notice design
rules are being violated, and you're going to be getting warranty
claims because you were stupid.

And that's not the only reason for an LGA to burn. One generation of
Intel, the motherboards used two brands of sockets, Lopes and Foxconn,
and one of the brands did not use the correct normal force to seat the
processor, and rows of contacts (a kind of pressure pattern) would
burn on the socket as a consequence. When you see swelling on the package,
this has the additional unintended consequence, of damaging the pressure
setting value of the pins. The pins don't receive the normal amount
of "pressing force", to keep the needle contact in touch with the gold
plated pad.

That's why, on really big LGA, they have multiple levers or screws, because
the forces called for are so high, a single lever is not enough. And the
constraining forces have to be distributed a bit to even everything out.

*******

Some hobbyists have used IR cameras to locate design mistakes.
One of my motherboards, an 8-pin DIP regulator, runs at 100C,
because there's no cooling fitted to it. And that was noticed with
an IR camera. The factory should also have an IR camera. That would
not have spotted this mistake (unless they imaged the solder side
of the PCB), but it might have noted an anomaly at the VSOC regulator area.

Measuring the rail current, is just as effective a debug technique for this.

Paul

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