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computers / comp.sys.mac.portables / Who is going to buy the first Arm (M1) MacBooks?

SubjectAuthor
* Who is going to buy the first Arm (M1) MacBooks?Ant
+* Re: Who is going to buy the first Arm (M1) MacBooks?Alan Baker
|`* Re: Who is going to buy the first Arm (M1) MacBooks?Ant
| +* Re: Who is going to buy the first Arm (M1) MacBooks?JF Mezei
| |+* Re: Who is going to buy the first Arm (M1) MacBooks?nospam
| ||+* Re: Who is going to buy the first Arm (M1) MacBooks?JF Mezei
| |||+- Re: Who is going to buy the first Arm (M1) MacBooks?nospam
| |||+- Re: Who is going to buy the first Arm (M1) MacBooks?Lewis
| |||`* Re: Who is going to buy the first Arm (M1) MacBooks?Alan Browne
| ||| +- Re: Who is going to buy the first Arm (M1) MacBooks?Alan Browne
| ||| `* Re: Who is going to buy the first Arm (M1) MacBooks?JF Mezei
| |||  `- Re: Who is going to buy the first Arm (M1) MacBooks?Alan Browne
| ||+* Re: Who is going to buy the first Arm (M1) MacBooks?JF Mezei
| |||+* Re: Who is going to buy the first Arm (M1) MacBooks?nospam
| ||||`* Re: Who is going to buy the first Arm (M1) MacBooks?JF Mezei
| |||| `* Re: Who is going to buy the first Arm (M1) MacBooks?nospam
| ||||  `* Re: Who is going to buy the first Arm (M1) MacBooks?Lewis
| ||||   +- Re: Who is going to buy the first Arm (M1) MacBooks?Jolly Roger
| ||||   `* Re: Who is going to buy the first Arm (M1) MacBooks?JF Mezei
| ||||    +- Re: Who is going to buy the first Arm (M1) MacBooks?Jolly Roger
| ||||    `* Re: Who is going to buy the first Arm (M1) MacBooks?Lewis
| ||||     `* Re: Who is going to buy the first Arm (M1) MacBooks?JF Mezei
| ||||      `- Re: Who is going to buy the first Arm (M1) MacBooks?Lewis
| |||`- Re: Who is going to buy the first Arm (M1) MacBooks?Alan Browne
| ||`- Re: Who is going to buy the first Arm (M1) MacBooks?Alan Browne
| |`- Re: Who is going to buy the first Arm (M1) MacBooks?Lewis
| +- Re: Who is going to buy the first Arm (M1) MacBooks?Lewis
| +* Re: Who is going to buy the first Arm (M1) MacBooks?Tim
| |`* Re: Who is going to buy the first Arm (M1) MacBooks?Ant
| | +- Re: Who is going to buy the first Arm (M1) MacBooks?nospam
| | `- Re: Who is going to buy the first Arm (M1) MacBooks?Your Name
| +- Re: Who is going to buy the first Arm (M1) MacBooks?nospam
| `* Re: Who is going to buy the first Arm (M1) MacBooks?Alan Baker
|  `- Re: Who is going to buy the first Arm (M1) MacBooks?Your Name
`* Re: Who is going to buy the first Arm (M1) MacBooks?Lewis
 +* Re: Who is going to buy the first Arm (M1) MacBooks?Alan Baker
 |`- Re: Who is going to buy the first Arm (M1) MacBooks?Lewis
 `* Re: Who is going to buy the first Arm (M1) MacBooks?Ant
  +- Re: Who is going to buy the first Arm (M1) MacBooks?Lewis
  +- Re: Who is going to buy the first Arm (M1) MacBooks?nospam
  +- Re: Who is going to buy the first Arm (M1) MacBooks?Tim
  `* Re: Who is going to buy the first Arm (M1) MacBooks?Your Name
   `* Re: Who is going to buy the first Arm (M1) MacBooks?Ant
    `* Re: Who is going to buy the first Arm (M1) MacBooks?Lewis
     `* Re: Who is going to buy the first Arm (M1) MacBooks?JF Mezei
      +* Re: Who is going to buy the first Arm (M1) MacBooks?nospam
      |`* Re: Who is going to buy the first Arm (M1) MacBooks?Alan Browne
      | `* Re: Who is going to buy the first Arm (M1) MacBooks?Lewis
      |  `* Re: Who is going to buy the first Arm (M1) MacBooks?Alan Browne
      |   `* Re: Who is going to buy the first Arm (M1) MacBooks?Lewis
      |    +* Re: Who is going to buy the first Arm (M1) MacBooks?nospam
      |    |`* Re: Who is going to buy the first Arm (M1) MacBooks?Lewis
      |    | `* Re: Who is going to buy the first Arm (M1) MacBooks?JF Mezei
      |    |  +* Re: Who is going to buy the first Arm (M1) MacBooks?nospam
      |    |  |+* Re: Who is going to buy the first Arm (M1) MacBooks?Alan Browne
      |    |  ||`* Re: Who is going to buy the first Arm (M1) MacBooks?nospam
      |    |  || `- Re: Who is going to buy the first Arm (M1) MacBooks?Alan Browne
      |    |  |`* Re: Who is going to buy the first Arm (M1) MacBooks?JF Mezei
      |    |  | +- Re: Who is going to buy the first Arm (M1) MacBooks?nospam
      |    |  | +* Re: Who is going to buy the first Arm (M1) MacBooks?Alan Browne
      |    |  | |`* Re: Who is going to buy the first Arm (M1) MacBooks?JF Mezei
      |    |  | | +- Re: Who is going to buy the first Arm (M1) MacBooks?nospam
      |    |  | | +* Re: Who is going to buy the first Arm (M1) MacBooks?Alan Browne
      |    |  | | |`* Re: Who is going to buy the first Arm (M1) MacBooks?JF Mezei
      |    |  | | | `* Re: Who is going to buy the first Arm (M1) MacBooks?Alan Browne
      |    |  | | |  `* Re: Who is going to buy the first Arm (M1) MacBooks?JF Mezei
      |    |  | | |   +* Re: Who is going to buy the first Arm (M1) MacBooks?nospam
      |    |  | | |   |`- Re: Who is going to buy the first Arm (M1) MacBooks?JF Mezei
      |    |  | | |   +- Re: Who is going to buy the first Arm (M1) MacBooks?Lewis
      |    |  | | |   `* Re: Who is going to buy the first Arm (M1) MacBooks?Alan Browne
      |    |  | | |    `* Re: Who is going to buy the first Arm (M1) MacBooks?JF Mezei
      |    |  | | |     +- Re: Who is going to buy the first Arm (M1) MacBooks?nospam
      |    |  | | |     `- Re: Who is going to buy the first Arm (M1) MacBooks?Alan Browne
      |    |  | | `- Re: Who is going to buy the first Arm (M1) MacBooks?Lewis
      |    |  | `* Re: Who is going to buy the first Arm (M1) MacBooks?Lewis
      |    |  |  `* Re: Who is going to buy the first Arm (M1) MacBooks?nospam
      |    |  |   `* Re: Who is going to buy the first Arm (M1) MacBooks?JF Mezei
      |    |  |    +- Re: Who is going to buy the first Arm (M1) MacBooks?nospam
      |    |  |    `* Re: Who is going to buy the first Arm (M1) MacBooks?Lewis
      |    |  |     `* Re: Who is going to buy the first Arm (M1) MacBooks?JF Mezei
      |    |  |      +* Re: Who is going to buy the first Arm (M1) MacBooks?Lewis
      |    |  |      |`- Re: Who is going to buy the first Arm (M1) MacBooks?Your Name
      |    |  |      +- Re: Who is going to buy the first Arm (M1) MacBooks?nospam
      |    |  |      `- Re: Who is going to buy the first Arm (M1) MacBooks?nospam
      |    |  +- Re: Who is going to buy the first Arm (M1) MacBooks?Lewis
      |    |  `* Re: Who is going to buy the first Arm (M1) MacBooks?Jolly Roger
      |    |   `* Re: Who is going to buy the first Arm (M1) MacBooks?JF Mezei
      |    |    `- Re: Who is going to buy the first Arm (M1) MacBooks?Jolly Roger
      |    `* Re: Who is going to buy the first Arm (M1) MacBooks?Alan Browne
      |     `* Re: Who is going to buy the first Arm (M1) MacBooks?Lewis
      |      `* Re: Who is going to buy the first Arm (M1) MacBooks?Alan Browne
      |       `* Re: Who is going to buy the first Arm (M1) MacBooks?Lewis
      |        `* Re: Who is going to buy the first Arm (M1) MacBooks?Alan Browne
      |         `* Re: Who is going to buy the first Arm (M1) MacBooks?Lewis
      |          `- Re: Who is going to buy the first Arm (M1) MacBooks?Alan Browne
      `- Re: Who is going to buy the first Arm (M1) MacBooks?Lewis

Pages:1234
Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
From: JF Mezei
Newsgroups: comp.sys.mac.system, comp.sys.mac.portables, comp.sys.mac.hardware.misc
Date: Mon, 16 Nov 2020 14:47 UTC
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Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
Newsgroups: comp.sys.mac.system,comp.sys.mac.portables,comp.sys.mac.hardware.misc
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From: jfmezei....@vaxination.ca (JF Mezei)
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On 2020-11-15 11:56, Alan Browne wrote:

Irrelevant to x86 / ARM transition and, read the news:  Alpha is OLD and
dead technology.

Intel's x86 has "alphas Inside". AMD has "Alphs Inside".  Apple's Ax
chips have Alpha inside. Don't underestimate the silent controbution it
made when it was given to varous groups and when engineers split off so
they woudln't be forced to wrok for Intel when HP "donated" them to Intel.

Multi-code memory controllers were first developped by Digital on Alpha.
Out of order execution, branch predictions done by DEC.

The most recent Itanium iteration had no improvement

While it failed, Itanic is the perfect eample of a platform where
writing in Assembler was strong dissuaded because the CPU expects the
compiler to do the optimizarions which it doesn't do.  (the E in EPIC
was because the compiler had to explicitedly add optcodes to tell the
CPU about blocks that could be executed in parralel).

Apple is very opaque when it comes to how it implemented the ARM
architecture. Not knowing the details of how it is implemented measn you
cannot optimize manually any assembler your write.


than clock speed.  And that was in 2017.  That is the end of that
product.  It's dead Jim.


Itanic died well before that. HP paid Intel to keep it on life support
because L:a Cary made the mistake of signing on hard long term
commitments. So what happened is that thye promised iterations were
spread over the remaining 15 years of that 20 year commitment. The last
one was, like the commitment for a last Alpha, the same chip but the
bvetter quality ones pushed to higher clock rate. (EV7z were EV7 Alpha
that passed tests at higher clock rates)



And yes, I've coded on VAX VMS, though exclusively HOL

Was was very very CISC, but because of that, was also vbery simple in
terms of how it processed instructions. This is whty Digital  moved to
RISC where it could then work on simpler instructions that could easily
be opto9mied and huge efficiency gains. Those optimizations is what
makes coding in Assember a lot harder if you want to be efficient.



For lazy assembler writers, sure.  Don't forget, at heart, the compiler
writes machine instructions that are entirely expressible in assembler.
  Thus a good assembler programmer would do fine.

The compiler and now LLVM are intimate with the target CPU and will do
optimiuzations that a organized Assembler program won't do because it
would become inreadable with operations i different order than your
logic requires.


As I've explained several times, writing good efficient code is the goal
of writing assembler.

This is old thinking because CPUs have gotten very complex under the
hood on how the process opcodes.  Assembler is required for very low
level stuff (drivers, hardware interface) and if you need to use
instructions such as encryptioN/copmpression tyat are in the CPU but not
accessible from high level language. (and at that, the code snippet is
very short, taking argumenst, issuing the opcode and then returning).



QUOTE
Rosetta 2 can convert an application right at installation time,
effectively creating an ARM-optimized version of the app before you’ve
opened it.


The binary being translated has been optimised for x86. Rosetta 2 will
translate to replicate x86 operations with a or multiple ARM
instructions. But it will not optmize, reorder or regroup opcodes to
make full use of how Apple implemented ARM.

This is why an application compiled for ARM will outperform the same
appliction compiled for x86 and then translated to ARM.


I was referring to stack machine call conventions for parameter passing
and saving return addresses, registers, etc.  You're referring to an
implementation abstraction.

At run time, the CPU does not know if you are pushing something on the
stack for the purposes of building an argument list for subsequent call
to subroutine (which for it, is a mere "branch") or whether you are
pushing something something on the stack because you are implementing a
LIFO buffer in your logic which must not be thinkered with.


the CPU has no idea when you will be popping items from the stack, nor
does it know how many items will be popped from the stack when the next
subroutine is called.

And do not forget that calling any system service will get you to a
jacket subroutine which will process your Intel-format argument line,
built an ARM formal argument list and then call the system service for
you. So the translator cannot willy nilly change push and pops into
register storage operations.



An RPN calculator, in HOL code, emulates a calculator stack in vars
(usually a linked list of some kind).  This is not the same as the
machine stack, but instead an abstraction of a calculator stack usually
implemented in a HOL such as C, Fortran, Pascal, etc.

A RPN calculator written in Assembler will make full use of the stack.
And the varous "stack" operations available from highler level languages
will make use of them as well.

Properly written and tested assembler code will avoid such faults.
Further, align pragmas are very present in assembler (and have been for
a very long time going back) if one wants speed over storage.  Just
design trade decisions.

Align pragmas align a variable. But if you need the 3rd byte of a 4 byte
variable, your assembler will be quite different if you run on a machine
that lets you access any byte, vs one that required only
quadword-aligned accesses. (at which point, you load value in register
and do shifts to get your 3rd byte).

I was replying to your I/O points that you snipped out and that I
restored above.[AAA].  Again: device drivers are less and less in
assembler and more and more HOL.

And for exactly the reasons I mentioned. What is left is truly the very
low level stuff.

=
A good programmer should have such knowledge - as I've pointed out
elsewhere.

So I take it that you are like nospam and lewis and claim to have
intimate knowledge of how Apple implemented ARM instriuctions, what sort
of logic its CPUs have in terms of instruction processing, pr-fetching,
parralel instruction decoding, pr-loading of values, branch prediction etc?


Assembler is not worth the cost in 99.99% of cases.  Adobe, who cater to
a huge audience including very high end photography and marketing
departments want to not only do the most, but do it fast.

Adobe products have to respond to a large variety of variants wvene
within the 8086 family. They likely have high level labnguage
implementation of logic, but if running on a a CPU that supports
instriction Z, will instead branch to a small assembler routine that
uses the opcode available on that CPU.

And I have to assume that Apple provided that info to Adobe under NDA a
long long time go.




Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
From: nospam
Newsgroups: comp.sys.mac.system, comp.sys.mac.portables, comp.sys.mac.hardware.misc
Organization: A noiseless patient Spider
Date: Mon, 16 Nov 2020 15:43 UTC
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From: nos...@nospam.invalid (nospam)
Newsgroups: comp.sys.mac.system,comp.sys.mac.portables,comp.sys.mac.hardware.misc
Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
Date: Mon, 16 Nov 2020 10:43:57 -0500
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In article <miwsH.528513$RY8.414225@fx48.iad>, JF Mezei
<jfmezei.spamnot@vaxination.ca> wrote:


Intel's x86 has "alphas Inside". AMD has "Alphs Inside".  Apple's Ax
chips have Alpha inside.

nonsense.


Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
From: Lewis
Newsgroups: comp.sys.mac.system, comp.sys.mac.portables, comp.sys.mac.hardware.misc
Organization: Miskatonic U
Date: Mon, 16 Nov 2020 15:48 UTC
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From: g.kr...@kreme.dont-email.me (Lewis)
Newsgroups: comp.sys.mac.system,comp.sys.mac.portables,comp.sys.mac.hardware.misc
Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
Date: Mon, 16 Nov 2020 15:48:08 -0000 (UTC)
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In message <miwsH.528513$RY8.414225@fx48.iad> JF Mezei <jfmezei.spamnot@vaxination.ca> wrote:
Intel's x86 has "alphas Inside". AMD has "Alphs Inside".  Apple's Ax
chips have Alpha inside.

PLEASE take your meds.

--
I had the weirdest dream last night where I was a chocolate doughnut and you
were a steam roller painted pink. What do you think it means?
I think it means you were asleep.


Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
From: Alan Browne
Newsgroups: comp.sys.mac.system, comp.sys.mac.portables, comp.sys.mac.hardware.misc
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Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
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From: bitbuc...@blackhole.com (Alan Browne)
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On 2020-11-16 09:47, JF Mezei wrote:
On 2020-11-15 11:56, Alan Browne wrote:

Was was very very CISC, but because of that, was also vbery simple in
terms of how it processed instructions. This is whty Digital  moved to
RISC where it could then work on simpler instructions that could easily
be opto9mied and huge efficiency gains. Those optimizations is what
makes coding in Assember a lot harder if you want to be efficient.

Writing assembler in RISC is just longer.  Not harder.  And yes, the goal is always to be efficient (speed).

The goal (in the day) of RISC was higher performance at lower machine cost.

And, as mentioned, the ARM-64 is pretty CISCy as are most formerly RISC processors have evolved over time.

Get over it.  Your comparisons to a dead era are meaningless.



For lazy assembler writers, sure.  Don't forget, at heart, the compiler
writes machine instructions that are entirely expressible in assembler.
   Thus a good assembler programmer would do fine.

The compiler and now LLVM are intimate with the target CPU and will do
optimiuzations that a organized Assembler program won't do because it
would become inreadable with operations i different order than your
logic requires.

Out of order ops are equally implementable by writing assembler.  If you mean predictive branching, then it's entirely irrelevant.

As I've explained several times, writing good efficient code is the goal
of writing assembler.

This is old thinking because CPUs have gotten very complex under the
hood on how the process opcodes.  Assembler is required for very low

No it is not old thinking.  You resort to assembler because the compiler is not doing as well as hand written machine code.

level stuff (drivers, hardware interface) and if you need to use
instructions such as encryptioN/copmpression tyat are in the CPU but not
accessible from high level language. (and at that, the code snippet is
very short, taking argumenst, issuing the opcode and then returning).

And (again) most drivers are actually in HOL.  Not assembler.  Because of all sorts of needs from portability to maintenance and simply because there is no difference in the HOL code for simple things like reading/writing ports/mem-mapped i/o.

The rest of what you write is simple nonsense.

QUOTE
Rosetta 2 can convert an application right at installation time,
effectively creating an ARM-optimized version of the app before you’ve
opened it.


The binary being translated has been optimised for x86. Rosetta 2 will
translate to replicate x86 operations with a or multiple ARM
instructions. But it will not optmize, reorder or regroup opcodes to
make full use of how Apple implemented ARM.

You have no clue at all how Rosetta 2 works.  Do you believe that Apple are working at your coarse level of unpracticed understanding or that perhaps they are making R2 really shine with a sophisticated conversion process - one that takes place at install time especially?

For most implementations the translation will be a one time (on install of the x86 code) event.  That one time event allows for all sorts of cleverness.


This is why an application compiled for ARM will outperform the same
appliction compiled for x86 and then translated to ARM.

Almost always.  But the difference between the compiled as ARM case and translated case will be far less than you assume.


I was referring to stack machine call conventions for parameter passing
and saving return addresses, registers, etc.  You're referring to an
implementation abstraction.

At run time, the CPU does not know if you are pushing something on the
stack for the purposes of building an argument list for subsequent call
to subroutine (which for it, is a mere "branch") or whether you are
pushing something something on the stack because you are implementing a
LIFO buffer in your logic which must not be thinkered with.

You don't seem to understand that the CPU stack is not the stack used in the abstraction of a thing like an RPN calculator.

the CPU has no idea when you will be popping items from the stack, nor
does it know how many items will be popped from the stack when the next
subroutine is called.

Again: implementation of RPN stack abstraction ≠ CPU stack.


And do not forget that calling any system service will get you to a
jacket subroutine which will process your Intel-format argument line,
built an ARM formal argument list and then call the system service for
you. So the translator cannot willy nilly change push and pops into
register storage operations.

You're so off on understanding how such can be implemented that it doesn't bear reply.

An RPN calculator, in HOL code, emulates a calculator stack in vars
(usually a linked list of some kind).  This is not the same as the
machine stack, but instead an abstraction of a calculator stack usually
implemented in a HOL such as C, Fortran, Pascal, etc.

A RPN calculator written in Assembler will make full use of the stack.
And the varous "stack" operations available from highler level languages
will make use of them as well.

You do not understand the difference between the implementation abstraction of the calculator "stack" and the CPU processor stack.  They are two separate entities.  Of course the later will be used, esp. as any such calculator will likely use recursion, but the abstraction of a calculator stack would not use the processor stack to abstract the RPN.

eg: in a HOL the RPN stack for a 16 deep RPN could be represented as:

ValStack=record
array[0..15] of double;
ptr: shortint;
end;

The pointer just keeps track of the last thing thrown to the stack (initial ptr value 15 or 0 depending on how you want to do it).  The procedures that operate the RPN would of course have to change that pointer and bound it and handle exceptions.  (One could have an open ended "stack" using a linked list instead at the cost of more handling).

And then operations would operate on that.  function calls would of course use the CPU stack, but the above record would be in local memory or the var section of that procedure (itself located on the stack).

Properly written and tested assembler code will avoid such faults.
Further, align pragmas are very present in assembler (and have been for
a very long time going back) if one wants speed over storage.  Just
design trade decisions.

Align pragmas align a variable. But if you need the 3rd byte of a 4 byte
variable, your assembler will be quite different if you run on a machine
that lets you access any byte, vs one that required only
quadword-aligned accesses. (at which point, you load value in register
and do shifts to get your 3rd byte).

The point of an align pragma is so the next declared variable begins on the align divisor address.  Properly accessing that variable results in a correct store or load.  Most assemblers will throw a warning if you load, eg: a byte, from a variable declared as a word (most notations do allow for accessing a sub byte of a longer var, but that has to be done explicitly to avoid a warning).

Every processor I've worked on does the shifting automatically (at the cost of a few machine cycles) if the word is not aligned.

Thus, esp. for stack located variables it makes sense to align as that memory is temporarily allocated to that function or procedure so there's no real memory "cost" to it.

Global variables are a different matter and lead to the programmer optimizing the order of variables, typically the largest (records of n bytes, then 8 byte, then 4....1) in groups to keep the large vars aligned, and to minimize memory unused due to align pragmas.

IOW, you're throwing up nonsense.  Again.


I was replying to your I/O points that you snipped out and that I
restored above.[AAA].  Again: device drivers are less and less in
assembler and more and more HOL.

And for exactly the reasons I mentioned. What is left is truly the very
low level stuff.

Not in Adobe's case it would appear.  They are doing some core functionality in assembler in order to have higher performance.

=
A good programmer should have such knowledge - as I've pointed out
elsewhere.

So I take it that you are like nospam and lewis and claim to have
intimate knowledge of how Apple implemented ARM instriuctions, what sort
of logic its CPUs have in terms of instruction processing, pr-fetching,
parralel instruction decoding, pr-loading of values, branch prediction etc?

I have intimate knowledge of real time programming in various assembler languages, though not ARM.  Looking at the ARM architecture there is nothing esp. daunting, and of course going forward from an architecture with 16 general purpose x 64b registers to one with 29 x 64b GP registers doesn't make anything harder - quite the opposite.


Assembler is not worth the cost in 99.99% of cases.  Adobe, who cater to
a huge audience including very high end photography and marketing
departments want to not only do the most, but do it fast.

Adobe products have to respond to a large variety of variants wvene
within the 8086 family. They likely have high level labnguage
implementation of logic, but if running on a a CPU that supports
instriction Z, will instead branch to a small assembler routine that
uses the opcode available on that CPU.

More likely to use blocks of code tailored to each processor variant. And I doubt it's granular to all possible variants but instead to the more useful ones.

Click here to read the complete article
Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
From: JF Mezei
Newsgroups: comp.sys.mac.system, comp.sys.mac.portables, comp.sys.mac.hardware.misc
Date: Mon, 16 Nov 2020 22:25 UTC
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Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
Newsgroups: comp.sys.mac.system,comp.sys.mac.portables,comp.sys.mac.hardware.misc
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From: jfmezei....@vaxination.ca (JF Mezei)
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On 2020-11-16 10:43, nospam wrote:
In article <miwsH.528513$RY8.414225@fx48.iad>, JF Mezei
<jfmezei.spamnot@vaxination.ca> wrote:


Intel's x86 has "alphas Inside". AMD has "Alphs Inside".  Apple's Ax
chips have Alpha inside.

nonsense.


Intel stole Alpha patents in mid 1990s. Digital won the lawsuit in 1997,
but instead of punishing Intel, as Digital was in the process of
downsizing itself so Compaq could buy it, it formally donated all Alpha
IP to Intel, committed its Digital-Unix port to Itanium (which was still
vapourware).

Alpha development continued with EV6 and EV7 and EV8 planned. When HP's
La Carly needed a distraction to postpone her being fired, she sagreed
to buy Compaq (which, like Digital, had set itself up for sale). Part of
this included killing Alpha in June 2001. HP announced purchase of
Compaq Sept 7 2001.

At that time, HP committed to completing EV7 and instead of EV8, set
target as EV7+.  EV7 was delayed as mucha s they could because it woudl
have made Itanium look like a 1950s computer.

As part of the deal for killing Alpha and porting the Digital and Tandem
machines to Itanium, HP gave alpha engineers to Intel (keeping epough to
finish EV7 and then they were also "donated" to Intel, as well as all
the intellectual property related to Alpha, in particular the high end
memory controller which would become rhe CSI/Quickpath. Digital had had
experience with non uniform memory access since the 1990s without much
success so with EV7 found the solition to make it work. This approach
ios the basis for most memory controllers today.

As part of HP divesting itself from chiup engineering, a lot of them
didn't go to Intel, but went instead to AMD and with a large group going
to PA Semi Conductors which apple purchased to make its own chips.



BTW, the 1997 Intel agreement also had Intel get Digital's Hudosn FAB
which was still state of the art (but never upgraded so abandonned), and
also Digital's Strong ARM IP.  The Strong ARM are the folks who fed the
Newton BTW.

intel squandered StrongARM in part because getting the Alpha IP gave it
a change to push its 8086 further.

The aspect which was of value to COmpaq and HP is that the "punishment"
Intel got for stealing Alpha IP was offering 8086s at low prices to
Digital, a deal inherited by COmpaq and later HP. As I recall it was a
10 year deal.




Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
From: JF Mezei
Newsgroups: comp.sys.mac.system, comp.sys.mac.portables, comp.sys.mac.hardware.misc
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Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
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On 2020-11-16 14:01, Alan Browne wrote:

And, as mentioned, the ARM-64 is pretty CISCy as are most formerly RISC
processors have evolved over time.

So can you please describe the various technique Apple has imp;lemeted
its its cores with regards to instruction pre-fetching, pipelining, out
of order excecution, prediuctive branching? From your discussion, you
appear to be fully comfortable with Apple's ARM cores so it would be a
great contribution if you could describe them to help others who need to
write efficient assembler.


Out of order ops are equally implementable by writing assembler.

And then try to get someone else to understand your source code.


The reason I brough up VAX to Alpha and Alpha to Inanium is excatctly
because the chips evolved into a situation where normal assembler
writing will often not only not take advantage of run-time optimizations
but can also slow things down if you do operaions in an order that
forces pre-feteched ionstructions to be reset and start from scartch again.



No it is not old thinking.  You resort to assembler because the compiler
is not doing as well as hand written machine code.

C, Fortran and COBOL , on older plaforms gnerated very efficient code.
On newwer platforms, tend to generate more efficient code due to
optimizations by the compiler.

C++ has a few more layers of abastractions, but can also generate very
efficient code, as with Apple's SWIFT. This is because the optimizatiosn
done by the compiler and then by LLVM make maximum use of the chip, and
the old concept of only assembly being fast is gone.



And (again) most drivers are actually in HOL.  Not assembler.  Because
of all sorts of needs from portability to maintenance

hardware drivers still need some assembler at lowest level to interface
with the hardware. Higher level drivers can be in C or other.

You have no clue at all how Rosetta 2 works.

Again, consider that Rosetta 2 links the translated image against
special system frameworks that accept Intel format calls and transform
them to ARM format calls and then call the desired system routine.

And within the translated image, the code still calls internal routines
with Intel format/technique for argument passing.

This says a LOT about what Rosetta does and doesn't do. And there cabn't
be logic changes because the translator needs to maintain the
environment expected by the rest of the code.



Do you believe that Apple
are working at your coarse level of unpracticed understanding or that
perhaps they are making R2 really shine with a sophisticated conversion
process - one that takes place at install time especially?


Rosetta 2 is a translator, not a recompiler. Yes, the translated image
runs natively as ARM code, but it maintains its Intel heritage for a lot
of stuff such as arguyment passing mechanisms.




For most implementations the translation will be a one time (on install
of the x86 code) event.  That one time event allows for all sorts of
cleverness.

Contrary to previous ports, there insn't much abandonware left on OS-X.
If you didn't compiled 64 bits, you're no longer present/supported on
platform. So of the software that is available now, chances are it will
all be recompiledc ro ARM shortly. There isn't much of a point to make a
translator that does AI on the binary code to understand what it tyries
to do and optimize it.

Consider also that OS-X is ARM native form day 1, comtrary to the 68K to
Power PC which kept many parts as 68K until finally converted. So there
is less of a need to make a super duper efficient translator.



You don't seem to understand that the CPU stack is not the stack used in
the abstraction of a thing like an RPN calculator.

The whole point of a CPU providing a stack is so it could be used. You
have no right to state that it is only used for argument passing.


Again: implementation of RPN stack abstraction ≠ CPU stack.

Are you saying it is illegal to use the stack for such an app?
On which CPU/OS is it illegal ?

The point of an align pragma is so the next declared variable begins on
the align divisor address.  Properly accessing that variable results in
a correct store or load.

You missed the point. Your variable may be aligned, but if the variable
is a single byte, the available assembly operation might force load 8
bytes into the register. So you then have to play with shifts within the
register to get the one byte places in the leest significant bits of the
register. (and do the shisfst with awareness of sign implementation on
that platform).

On a compiler, this is done for you in the most efficient way and the
compiler may decide dto put many 1 byte variables together so one load
from memory allows access to any of the variable from register.


Every processor I've worked on does the shifting automatically (at the
cost of a few machine cycles) if the word is not aligned.

For Itanic, it was an acual fault for the early versions. Heavy
performance penalty. The fault code would then pickup the 8 bytes and
extract what you needed from it for you. Whe Intel designed the chip,
they though compilers would take care of this. But it turns out not all
computing is scientific, and the business applications on those large
machines tended to treat charactersas strings and not numbers whene
processing a client record. So even COBOL ended up generating terrible
performance.



Not in Adobe's case it would appear.  They are doing some core
functionality in assembler in order to have higher performance.

I doubt there is much in Assembler code. Likely very small routines that
make use of 1 opcode to encode/decode/copmpress/decompress a block, with
a high level routine doing the same work sitting on the siote for when
app is execured on a CPU that doesn't have that extra instruction.

I have intimate knowledge of real time programming in various assembler
languages, though not ARM.  Looking at the ARM architecture there is
nothing esp. daunting, and of course going forward from an architecture
with 16 general purpose x 64b registers to one with 29 x 64b GP
registers doesn't make anything harder - quite the opposite.

It is how it is implemented that matters. The stuff one doesn't see such
as instruction pre-fecching/decoding, pipelining, etc.

Conclusion:  you don't know much about machine level programming.  Your
silly RPN example is clear evidence of that (can't discern between the
CPU stack and an RPN program stack abstraction).

Not surprising coming from you or your ilk such as nospam and lewis.


The M1 is blazing fast for a variety of reasons from the CPU design
(always getting better) to an optimized use of memory ("unified")

Oh come on now. "unified memnory" is just marketing bullshit.  Apple
hasn' conformed memory type or speed on the M1, it is only speculation
that it is the same as on the Intel model (the Lo power DDR4).

Real benchmarks should start popping up soon. Ones that last a few
minutes, enough to test thermal performance.



And I expect that the M2 and on will quite fantastic with even higher
core counts appropriate to iMacs, higher end minis and laptops and "pro"
machines.

Only time will tell how Apple will scale its Axx chips to the Mac line
and what will become of the Mac Pro. And only time will tell whether the
Apple Macs will be narrowed to specific uses for which benchmarks are
produced or whether they will remain , like the x86, for generic computing.

aka: chip perfect for viewing H.265 videos, but sucks at calculating pi
to 5 billion decimals.



Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
From: nospam
Newsgroups: comp.sys.mac.system, comp.sys.mac.portables, comp.sys.mac.hardware.misc
Organization: A noiseless patient Spider
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From: nos...@nospam.invalid (nospam)
Newsgroups: comp.sys.mac.system,comp.sys.mac.portables,comp.sys.mac.hardware.misc
Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
Date: Mon, 16 Nov 2020 21:33:38 -0500
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In article <ShEsH.225224$BL.86100@fx16.iad>, JF Mezei
<jfmezei.spamnot@vaxination.ca> wrote:



No it is not old thinking.  You resort to assembler because the compiler
is not doing as well as hand written machine code.

C, Fortran and COBOL , on older plaforms gnerated very efficient code.
On newwer platforms, tend to generate more efficient code due to
optimizations by the compiler.

hah, no.

C++ has a few more layers of abastractions, but can also generate very
efficient code, as with Apple's SWIFT. This is because the optimizatiosn
done by the compiler and then by LLVM make maximum use of the chip, and
the old concept of only assembly being fast is gone.

c++ has a lot more info for the compiler to be able to optimize than c,
fortran or cobol.

optimized cobol. that's really funny.

And (again) most drivers are actually in HOL.  Not assembler.  Because
of all sorts of needs from portability to maintenance

hardware drivers still need some assembler at lowest level to interface
with the hardware.

no they don't.

Higher level drivers can be in C or other.

that part is true.


 

Consider also that OS-X is ARM native form day 1, comtrary to the 68K to
Power PC which kept many parts as 68K until finally converted. So there
is less of a need to make a super duper efficient translator.

68k apps ran faster on powerpc than they natively ran on 68k macs.

some intel apps will run faster on m1 than natively on intel. it's
still much too early to know just how many and by how much.

You don't seem to understand that the CPU stack is not the stack used in
the abstraction of a thing like an RPN calculator.

The whole point of a CPU providing a stack is so it could be used. You
have no right to state that it is only used for argument passing.

Again: implementation of RPN stack abstraction ‚ CPU stack.

Are you saying it is illegal to use the stack for such an app?
On which CPU/OS is it illegal ?

whooooooooosh.

The point of an align pragma is so the next declared variable begins on
the align divisor address.  Properly accessing that variable results in
a correct store or load.

You missed the point. Your variable may be aligned, but if the variable
is a single byte, the available assembly operation might force load 8
bytes into the register. So you then have to play with shifts within the
register to get the one byte places in the leest significant bits of the
register. (and do the shisfst with awareness of sign implementation on
that platform).

no.

On a compiler, this is done for you in the most efficient way and the
compiler may decide dto put many 1 byte variables together so one load
from memory allows access to any of the variable from register.

maybe, if there are enough to actually do that and it makes sense,
which it might not. typically it's padded.

Every processor I've worked on does the shifting automatically (at the
cost of a few machine cycles) if the word is not aligned.

For Itanic, it was an acual fault for the early versions. Heavy
performance penalty. The fault code would then pickup the 8 bytes and
extract what you needed from it for you. Whe Intel designed the chip,
they though compilers would take care of this. But it turns out not all
computing is scientific, and the business applications on those large
machines tended to treat charactersas strings and not numbers whene
processing a client record. So even COBOL ended up generating terrible
performance.

earlier, you said cobol was highly optimized. what happened?

Not in Adobe's case it would appear.  They are doing some core
functionality in assembler in order to have higher performance.

I doubt there is much in Assembler code. Likely very small routines that
make use of 1 opcode to encode/decode/copmpress/decompress a block, with
a high level routine doing the same work sitting on the siote for when
app is execured on a CPU that doesn't have that extra instruction.

another one of your uninformed assumptions.

with photoshop, key core image processing routines are *very* highly
optimized, to where they are tuned for different versions of processors
in the same family.





The M1 is blazing fast for a variety of reasons from the CPU design
(always getting better) to an optimized use of memory ("unified")

Oh come on now. "unified memnory" is just marketing bullshit.  Apple
hasn' conformed memory type or speed on the M1, it is only speculation
that it is the same as on the Intel model (the Lo power DDR4).

it very definitely is *not* marketing bullshit.

Real benchmarks should start popping up soon. Ones that last a few
minutes, enough to test thermal performance.

they already have been and are extremely impressive.

https://www.macrumors.com/2020/11/15/m1-chip-emulating-x86-benchmark/
  Despite the impact on performance, the single-core Rosetta 2
  score results still outperforms any other Intel Mac, including the
  2020 27-inch iMac with Intel Core i9-10910 @ 3.6GHz.

And I expect that the M2 and on will quite fantastic with even higher
core counts appropriate to iMacs, higher end minis and laptops and "pro"
machines.

Only time will tell how Apple will scale its Axx chips to the Mac line
and what will become of the Mac Pro.

how many times do you have to be told that the a* chips are for phones
and ipads, not for macs?

apple's announcement made this *very* clear by choosing an entirely new
letter, m, for the mac processors, at least initially.

it's likely that higher end apple silicon processors destined for the
mac pro and imac pro might get their own letter rather than a m-variant
(e.g., m1x), much like intel does with core i5/i7 and xeon.


Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
From: nospam
Newsgroups: comp.sys.mac.system, comp.sys.mac.portables, comp.sys.mac.hardware.misc
Organization: A noiseless patient Spider
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From: nos...@nospam.invalid (nospam)
Newsgroups: comp.sys.mac.system,comp.sys.mac.portables,comp.sys.mac.hardware.misc
Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
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In article <2C1sH.110171$4d1.92234@fx09.iad>, JF Mezei
<jfmezei.spamnot@vaxination.ca> wrote:

Omni, all app on day one for M1. Affinity, all apps on M1 on one. Adobe
and Microsoft? Eh, some day next year probably. Google? 2027 for
anything not Chrome.


The keynote spoke at great length of its laptops for video and photo
editing. It didn't focus on those laptops being use for workd processor
or email. If the keynote focuses on the very tasks handled by Adobe,
then if Adobe isn't there, it's a problem.

(Especially since at WWDC they demoed Adobe software running translated,
which shows they place importance on Adobe software.

native photoshop will be a lot sooner than you might think.

https://www.macrumors.com/2020/11/17/photoshop-apple-silicon-beta/
  We are excited to announce the first Beta release of Photoshop
  running natively on Apple Silicon hardware!


Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
From: Alan Browne
Newsgroups: comp.sys.mac.system, comp.sys.mac.portables, comp.sys.mac.hardware.misc
Organization: UsenetServer - www.usenetserver.com
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Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
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From: bitbuc...@blackhole.com (Alan Browne)
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On 2020-11-16 18:53, JF Mezei wrote:
On 2020-11-16 14:01, Alan Browne wrote:

And, as mentioned, the ARM-64 is pretty CISCy as are most formerly RISC
processors have evolved over time.

So can you please describe

Don't even try games like that.  It's clear your understanding of CPU design is rooted in the 80s with buzzwords from the trade press ever since.

--
"...there are many humorous things in this world; among them the white
  man's notion that he is less savage than the other savages."
                                             -Samuel Clemens


Subject: Who is going to buy the first Arm (M1) MacBooks?
From: Ant
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Date: Wed, 11 Nov 2020 20:46 UTC
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Subject: Who is going to buy the first Arm (M1) MacBooks?
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So, who is going to buy the first Arm (M1) MacBooks? ;)

Thank you for reading and hopefully answering. :)
--
Life's so loco! ..!.. *isms, sins, hates, (d)evil, tiredness, z, my body, illnesses (e.g., COVID-19 & SARS-CoV-2), deaths (RIP), heat, interruptions, issues, conflicts, obstacles, stresses, fires, out(r)ages, dramas, unlucky #4, 2020, greeds, bugs (e.g., crashes & female mosquitoes), etc. D:
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  /\___/\   Ant(Dude) @ http://aqfl.net & http://antfarm.home.dhs.org
 / /\ /\ \                      Please nuke ANT if replying by e-mail.
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Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
From: Alan Baker
Newsgroups: comp.sys.mac.system, comp.sys.mac.portables, comp.sys.mac.systems, comp.sys.mac.hardware.misc
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Date: Wed, 11 Nov 2020 20:57 UTC
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From: notonyou...@no.no.no.no (Alan Baker)
Newsgroups: comp.sys.mac.system,comp.sys.mac.portables,comp.sys.mac.systems,comp.sys.mac.hardware.misc
Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
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On 2020-11-11 12:46 p.m., Ant wrote:
So, who is going to buy the first Arm (M1) MacBooks? ;)

Thank you for reading and hopefully answering. :)


I'm seriously considering it.

I'm about due for a new system...

....but I'm loath to be an earlier adopter.

:-)


Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
From: Lewis
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In message <B5ednfUswZo00DHCnZ2dnUU7-LudnZ2d@earthlink.com> Ant <ant@zimage.comANT> wrote:
So, who is going to buy the first Arm (M1) MacBooks? ;)

I am ordering a MBA as soon as I decide if I should increase the RAM or
not. It will be mostly for my wife who almost certainly doesn't need
16GB, but I am torn.


--
I'm literally becoming less cool with every word you speak.


Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
From: Alan Baker
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From: notonyou...@no.no.no.no (Alan Baker)
Newsgroups: comp.sys.mac.system,comp.sys.mac.portables,comp.sys.mac.systems,comp.sys.mac.hardware.misc
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On 2020-11-11 2:22 p.m., Lewis wrote:
In message <B5ednfUswZo00DHCnZ2dnUU7-LudnZ2d@earthlink.com> Ant <ant@zimage.comANT> wrote:
So, who is going to buy the first Arm (M1) MacBooks? ;)

I am ordering a MBA as soon as I decide if I should increase the RAM or
not. It will be mostly for my wife who almost certainly doesn't need
16GB, but I am torn.



Spend the money and get the 16GB.

You're buying a machine to last the next 5 years or more. The extra RAM will cost you (I'm in Canada) about $250CAD, so that's $50 per year to ensure the machine has what it will need for the latter part of its life.


Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
From: Ant
Newsgroups: comp.sys.mac.system, comp.sys.mac.portables, comp.sys.mac.systems, comp.sys.mac.hardware.misc
Date: Wed, 11 Nov 2020 22:40 UTC
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From: ant...@zimage.comANT (Ant)
Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
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In comp.sys.mac.system Alan Baker <notonyourlife@no.no.no.no> wrote:
On 2020-11-11 12:46 p.m., Ant wrote:
So, who is going to buy the first Arm (M1) MacBooks? ;)

Thank you for reading and hopefully answering. :)


I'm seriously considering it.

I'm about due for a new system...

...but I'm loath to be an earlier adopter.

:-)

It looks like Apple doesn't even sell its old Intel Macs from its web site? :(
--
Life's so loco! ..!.. *isms, sins, hates, (d)evil, tiredness, z, my body, illnesses (e.g., COVID-19 & SARS-CoV-2), deaths (RIP), heat, interruptions, issues, conflicts, obstacles, stresses, fires, out(r)ages, dramas, unlucky #4, 2020, greeds, bugs (e.g., crashes & female mosquitoes), etc. D:
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Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
From: Ant
Newsgroups: comp.sys.mac.system, comp.sys.mac.portables, comp.sys.mac.systems, comp.sys.mac.hardware.misc
Date: Wed, 11 Nov 2020 22:40 UTC
References: 1 2
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From: ant...@zimage.comANT (Ant)
Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
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In comp.sys.mac.system Lewis <g.kreme@kreme.dont-email.me> wrote:
In message <B5ednfUswZo00DHCnZ2dnUU7-LudnZ2d@earthlink.com> Ant <ant@zimage.comANT> wrote:
So, who is going to buy the first Arm (M1) MacBooks? ;)

I am ordering a MBA as soon as I decide if I should increase the RAM or
not. It will be mostly for my wife who almost certainly doesn't need
16GB, but I am torn.

Aren't the RAMs still soldered in? If so, then you might as well go as big as
you can afford. Same for storage. :(
--
Life's so loco! ..!.. *isms, sins, hates, (d)evil, tiredness, z, my body, illnesses (e.g., COVID-19 & SARS-CoV-2), deaths (RIP), heat, interruptions, issues, conflicts, obstacles, stresses, fires, out(r)ages, dramas, unlucky #4, 2020, greeds, bugs (e.g., crashes & female mosquitoes), etc. D:
Note: A fixed width font (Courier, Monospace, etc.) is required to see this signature correctly.
  /\___/\   Ant(Dude) @ http://aqfl.net & http://antfarm.home.dhs.org
 / /\ /\ \                      Please nuke ANT if replying by e-mail.
| |o   o| |
   \ _ /
    ( )


Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
From: Tim
Newsgroups: comp.sys.mac.hardware.misc, comp.sys.mac.portables, comp.sys.mac.system, comp.sys.mac.systems
Date: Wed, 11 Nov 2020 22:45 UTC
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From: timstrea...@greenbee.net (Tim)
Newsgroups: comp.sys.mac.hardware.misc,comp.sys.mac.portables,comp.sys.mac.system,comp.sys.mac.systems
Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
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On 11 Nov 2020 at 22:40:09 GMT, Ant <Ant> wrote:

It looks like Apple doesn't even sell its old Intel Macs from its web site? :(

You can still buy Intel Minis.

--
Tim




Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
From: nospam
Newsgroups: comp.sys.mac.system, comp.sys.mac.portables, comp.sys.mac.systems, comp.sys.mac.hardware.misc
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Newsgroups: comp.sys.mac.system,comp.sys.mac.portables,comp.sys.mac.systems,comp.sys.mac.hardware.misc
Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
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In article <XP2dnVNnM_jU9THCnZ2dnUU7-f-dnZ2d@earthlink.com>, Ant
<ant@zimage.comANT> wrote:

It looks like Apple doesn't even sell its old Intel Macs from its web site? :(

yes they do, and there's a lot of them.


Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
From: nospam
Newsgroups: comp.sys.mac.system, comp.sys.mac.portables, comp.sys.mac.systems, comp.sys.mac.hardware.misc
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Newsgroups: comp.sys.mac.system,comp.sys.mac.portables,comp.sys.mac.systems,comp.sys.mac.hardware.misc
Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
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In article <XP2dnVJnM_js9THCnZ2dnUU7-f-dnZ2d@earthlink.com>, Ant
<ant@zimage.comANT> wrote:


Aren't the RAMs still soldered in? If so, then you might as well go as big as
you can afford. Same for storage. :(

no.  the ram is in the m1 itself.


Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
From: Tim
Newsgroups: comp.sys.mac.hardware.misc, comp.sys.mac.portables, comp.sys.mac.system, comp.sys.mac.systems
Date: Wed, 11 Nov 2020 22:46 UTC
References: 1 2 3
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From: timstrea...@greenbee.net (Tim)
Newsgroups: comp.sys.mac.hardware.misc,comp.sys.mac.portables,comp.sys.mac.system,comp.sys.mac.systems
Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
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On 11 Nov 2020 at 22:40:49 GMT, Ant <Ant> wrote:

In comp.sys.mac.system Lewis <g.kreme@kreme.dont-email.me> wrote:
 In message <B5ednfUswZo00DHCnZ2dnUU7-LudnZ2d@earthlink.com> Ant <ant@zimage.comANT> wrote:
 > So, who is going to buy the first Arm (M1) MacBooks? ;)

 I am ordering a MBA as soon as I decide if I should increase the RAM or
 not. It will be mostly for my wife who almost certainly doesn't need
 16GB, but I am torn.

Aren't the RAMs still soldered in? If so, then you might as well go as big as
you can afford. Same for storage. :(

Seems the RAM is inside the M1 chip.

--
Tim




Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
From: Alan Baker
Newsgroups: comp.sys.mac.system, comp.sys.mac.portables, comp.sys.mac.systems, comp.sys.mac.hardware.misc
Organization: A noiseless patient Spider
Date: Wed, 11 Nov 2020 23:27 UTC
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From: notonyou...@no.no.no.no (Alan Baker)
Newsgroups: comp.sys.mac.system,comp.sys.mac.portables,comp.sys.mac.systems,comp.sys.mac.hardware.misc
Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
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On 2020-11-11 2:40 p.m., Ant wrote:
In comp.sys.mac.system Alan Baker <notonyourlife@no.no.no.no> wrote:
On 2020-11-11 12:46 p.m., Ant wrote:
So, who is going to buy the first Arm (M1) MacBooks? ;)

Thank you for reading and hopefully answering. :)


I'm seriously considering it.

I'm about due for a new system...

...but I'm loath to be an earlier adopter.

:-)

It looks like Apple doesn't even sell its old Intel Macs from its web site? :(


Nope.

It doesn't look like that at all.

PEBCAK


Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
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From: YourN...@YourISP.com (Your Name)
Newsgroups: comp.sys.mac.system,comp.sys.mac.portables,comp.sys.mac.hardware.misc
Subject: Re: Who is going to buy the first Arm (M1) MacBooks?
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On 2020-11-11 22:40:49 +0000, Ant said:
In comp.sys.mac.system Lewis <g.kreme@kreme.dont-email.me> wrote:
In message <B5ednfUswZo00DHCnZ2dnUU7-LudnZ2d@earthlink.com> Ant <ant@zimage.comANT> wrote:

So, who is going to buy the first Arm (M1) MacBooks? ;)

I am ordering a MBA as soon as I decide if I should increase the RAM or
not. It will be mostly for my wife who almost certainly doesn't need
16GB, but I am torn.

Aren't the RAMs still soldered in? If so, then you might as well go as big as
you can afford. Same for storage. :(

Yep. It is one of the biggest pain-in-the-backside points with Apple these days, especially considering Apple's over-pricing of RAM and storage drives.  :-(



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