Rocksolid Light

Welcome to novaBBS (click a section below)

mail  files  register  newsreader  groups  login

Message-ID:  

I have never seen anything fill up a vacuum so fast and still suck. -- Rob Pike, on X.


devel / comp.arch / Re: RISC-V vs. Aarch64

SubjectAuthor
* RISC-V vs. Aarch64Anton Ertl
+* Re: RISC-V vs. Aarch64MitchAlsup
|+* Re: RISC-V vs. Aarch64Anton Ertl
||`* Re: RISC-V vs. Aarch64MitchAlsup
|| +- Re: RISC-V vs. Aarch64BGB
|| `- Re: RISC-V vs. Aarch64Anton Ertl
|+* Re: RISC-V vs. Aarch64Ivan Godard
||+- Re: RISC-V vs. Aarch64robf...@gmail.com
||+- Re: RISC-V vs. Aarch64MitchAlsup
||`* Re: RISC-V vs. Aarch64Quadibloc
|| `* Re: RISC-V vs. Aarch64Quadibloc
||  `- Re: RISC-V vs. Aarch64Quadibloc
|+* Re: RISC-V vs. Aarch64Marcus
||+- Re: RISC-V vs. Aarch64BGB
||`* Re: RISC-V vs. Aarch64MitchAlsup
|| +- Re: RISC-V vs. Aarch64BGB
|| `- Re: RISC-V vs. Aarch64Ivan Godard
|`- Re: RISC-V vs. Aarch64MitchAlsup
`* Re: RISC-V vs. Aarch64BGB
 +* Re: RISC-V vs. Aarch64MitchAlsup
 |+- Re: RISC-V vs. Aarch64MitchAlsup
 |+* Re: RISC-V vs. Aarch64Thomas Koenig
 ||+* Re: RISC-V vs. Aarch64Ivan Godard
 |||`* Re: RISC-V vs. Aarch64EricP
 ||| `- Re: RISC-V vs. Aarch64Ivan Godard
 ||+* Re: RISC-V vs. Aarch64MitchAlsup
 |||`* Re: RISC-V vs. Aarch64Ivan Godard
 ||| `* Re: RISC-V vs. Aarch64MitchAlsup
 |||  `* Re: RISC-V vs. Aarch64Ivan Godard
 |||   `* Re: RISC-V vs. Aarch64MitchAlsup
 |||    `- Re: RISC-V vs. Aarch64Marcus
 ||`* Re: RISC-V vs. Aarch64BGB
 || `- Re: RISC-V vs. Aarch64MitchAlsup
 |+* Re: RISC-V vs. Aarch64BGB
 ||`* Re: RISC-V vs. Aarch64MitchAlsup
 || `- Re: RISC-V vs. Aarch64Thomas Koenig
 |`* Re: RISC-V vs. Aarch64Marcus
 | `* Re: RISC-V vs. Aarch64EricP
 |  +* Re: RISC-V vs. Aarch64Marcus
 |  |+* Re: RISC-V vs. Aarch64MitchAlsup
 |  ||+* Re: RISC-V vs. Aarch64Niklas Holsti
 |  |||+* Re: RISC-V vs. Aarch64Bill Findlay
 |  ||||`- Re: RISC-V vs. Aarch64MitchAlsup
 |  |||`- Re: RISC-V vs. Aarch64Ivan Godard
 |  ||`- Re: RISC-V vs. Aarch64Thomas Koenig
 |  |+* Re: RISC-V vs. Aarch64Thomas Koenig
 |  ||+* Re: RISC-V vs. Aarch64MitchAlsup
 |  |||`- Re: RISC-V vs. Aarch64BGB
 |  ||+* Re: RISC-V vs. Aarch64Ivan Godard
 |  |||`* Re: RISC-V vs. Aarch64Thomas Koenig
 |  ||| `- Re: RISC-V vs. Aarch64Ivan Godard
 |  ||`* Re: RISC-V vs. Aarch64Marcus
 |  || +* Re: RISC-V vs. Aarch64Thomas Koenig
 |  || |`* Re: RISC-V vs. Aarch64aph
 |  || | +- Re: RISC-V vs. Aarch64Michael S
 |  || | `* Re: RISC-V vs. Aarch64Thomas Koenig
 |  || |  `* Re: RISC-V vs. Aarch64robf...@gmail.com
 |  || |   +* Re: RISC-V vs. Aarch64Ivan Godard
 |  || |   |`- Re: RISC-V vs. Aarch64Tim Rentsch
 |  || |   `* Re: RISC-V vs. Aarch64Terje Mathisen
 |  || |    `* Re: RISC-V vs. Aarch64Thomas Koenig
 |  || |     `* Re: RISC-V vs. Aarch64Marcus
 |  || |      `* Re: RISC-V vs. Aarch64Guillaume
 |  || |       `* Re: RISC-V vs. Aarch64MitchAlsup
 |  || |        +- Re: RISC-V vs. Aarch64Marcus
 |  || |        +* Re: RISC-V vs. Aarch64Ivan Godard
 |  || |        |`* Re: RISC-V vs. Aarch64MitchAlsup
 |  || |        | `* Re: RISC-V vs. Aarch64Ivan Godard
 |  || |        |  `* Re: RISC-V vs. Aarch64Thomas Koenig
 |  || |        |   `* Re: RISC-V vs. Aarch64Ivan Godard
 |  || |        |    `* Re: RISC-V vs. Aarch64EricP
 |  || |        |     +* Re: RISC-V vs. Aarch64MitchAlsup
 |  || |        |     |`* Re: RISC-V vs. Aarch64EricP
 |  || |        |     | `- Re: RISC-V vs. Aarch64MitchAlsup
 |  || |        |     `* Re: RISC-V vs. Aarch64Ivan Godard
 |  || |        |      `* Re: RISC-V vs. Aarch64EricP
 |  || |        |       +- Re: RISC-V vs. Aarch64MitchAlsup
 |  || |        |       `* Re: RISC-V vs. Aarch64Ivan Godard
 |  || |        |        +* Re: RISC-V vs. Aarch64Brett
 |  || |        |        |+* Re: RISC-V vs. Aarch64MitchAlsup
 |  || |        |        ||`- Re: RISC-V vs. Aarch64Ivan Godard
 |  || |        |        |`- Re: RISC-V vs. Aarch64Ivan Godard
 |  || |        |        `* Re: RISC-V vs. Aarch64Stephen Fuld
 |  || |        |         `* Re: RISC-V vs. Aarch64Ivan Godard
 |  || |        |          +* Re: RISC-V vs. Aarch64Stefan Monnier
 |  || |        |          |`- Re: RISC-V vs. Aarch64Ivan Godard
 |  || |        |          +* Re: RISC-V vs. Aarch64MitchAlsup
 |  || |        |          |`* Re: RISC-V vs. Aarch64Ivan Godard
 |  || |        |          | `- Re: RISC-V vs. Aarch64MitchAlsup
 |  || |        |          +* Re: RISC-V vs. Aarch64Stephen Fuld
 |  || |        |          |`- Re: RISC-V vs. Aarch64Ivan Godard
 |  || |        |          `* Re: RISC-V vs. Aarch64EricP
 |  || |        |           +* Re: RISC-V vs. Aarch64EricP
 |  || |        |           |`* Re: RISC-V vs. Aarch64Ivan Godard
 |  || |        |           | `* The type of Mill's belt's slotsStefan Monnier
 |  || |        |           |  +- Re: The type of Mill's belt's slotsMitchAlsup
 |  || |        |           |  `* Re: The type of Mill's belt's slotsIvan Godard
 |  || |        |           |   `* Re: The type of Mill's belt's slotsStefan Monnier
 |  || |        |           |    `* Re: The type of Mill's belt's slotsIvan Godard
 |  || |        |           |     +* Re: The type of Mill's belt's slotsStefan Monnier
 |  || |        |           |     |`* Re: The type of Mill's belt's slotsIvan Godard
 |  || |        |           |     `* Re: The type of Mill's belt's slotsMitchAlsup
 |  || |        |           `- Re: RISC-V vs. Aarch64Ivan Godard
 |  || |        +* Re: RISC-V vs. Aarch64Guillaume
 |  || |        `* Re: RISC-V vs. Aarch64Quadibloc
 |  || `* MRISC32 vectorization (was: RISC-V vs. Aarch64)Thomas Koenig
 |  |`* Re: RISC-V vs. Aarch64Terje Mathisen
 |  `- Re: RISC-V vs. Aarch64Quadibloc
 +* Re: RISC-V vs. Aarch64Anton Ertl
 `- Re: RISC-V vs. Aarch64aph

Pages:123456789101112131415
Re: RISC-V vs. Aarch64

<172ecb29-5ba8-4a35-9a77-7fba617e7389n@googlegroups.com>

  copy mid

https://www.novabbs.com/devel/article-flat.php?id=22631&group=comp.arch#22631

  copy link   Newsgroups: comp.arch
X-Received: by 2002:a05:6214:20ec:: with SMTP id 12mr28380161qvk.0.1640899476829;
Thu, 30 Dec 2021 13:24:36 -0800 (PST)
X-Received: by 2002:a9d:4b04:: with SMTP id q4mr9974764otf.144.1640899476546;
Thu, 30 Dec 2021 13:24:36 -0800 (PST)
Path: i2pn2.org!i2pn.org!weretis.net!feeder6.news.weretis.net!news.misty.com!border2.nntp.dca1.giganews.com!nntp.giganews.com!news-out.google.com!nntp.google.com!postnews.google.com!google-groups.googlegroups.com!not-for-mail
Newsgroups: comp.arch
Date: Thu, 30 Dec 2021 13:24:36 -0800 (PST)
In-Reply-To: <sq675n$tht$1@dont-email.me>
Injection-Info: google-groups.googlegroups.com; posting-host=2001:56a:fb70:6300:d1d6:d3:c967:ac44;
posting-account=1nOeKQkAAABD2jxp4Pzmx9Hx5g9miO8y
NNTP-Posting-Host: 2001:56a:fb70:6300:d1d6:d3:c967:ac44
References: <2021Dec24.163843@mips.complang.tuwien.ac.at> <0a8ff16a-53de-420e-9c82-cfc9e87f62e9n@googlegroups.com>
<sq675n$tht$1@dont-email.me>
User-Agent: G2/1.0
MIME-Version: 1.0
Message-ID: <172ecb29-5ba8-4a35-9a77-7fba617e7389n@googlegroups.com>
Subject: Re: RISC-V vs. Aarch64
From: jsav...@ecn.ab.ca (Quadibloc)
Injection-Date: Thu, 30 Dec 2021 21:24:36 +0000
Content-Type: text/plain; charset="UTF-8"
Lines: 18
 by: Quadibloc - Thu, 30 Dec 2021 21:24 UTC

On Friday, December 24, 2021 at 9:37:14 PM UTC-7, Ivan Godard wrote:
> On 12/24/2021 10:17 AM, MitchAlsup wrote:

> > There is NO JUSTIFIABLE reason that an instruction is not entirely
> > self-contained!

> Really? I suppose that might be true for OOO that is emulating
> sequential execution, but what about VLIW and other wide multi-issue?

> Chopping off the variable and large parts so they can be recognized in
> parallel lets the issue width no longer depend on how many constants you
> have.

This is the sort of thing I've been fooling around with finding a way to
achieve. To avoid too much complexity, my recent designs all involved
a self-contained 256-bit block which combined as many fixed-length
instructions as possible with the variable or large parts they needed.

John Savard

Re: RISC-V vs. Aarch64

<7c191722-66f5-417a-855b-976cafd1b770n@googlegroups.com>

  copy mid

https://www.novabbs.com/devel/article-flat.php?id=22632&group=comp.arch#22632

  copy link   Newsgroups: comp.arch
X-Received: by 2002:ac8:4e96:: with SMTP id 22mr29137859qtp.76.1640903865969;
Thu, 30 Dec 2021 14:37:45 -0800 (PST)
X-Received: by 2002:a05:6808:1248:: with SMTP id o8mr25249975oiv.157.1640903865699;
Thu, 30 Dec 2021 14:37:45 -0800 (PST)
Path: i2pn2.org!i2pn.org!weretis.net!feeder6.news.weretis.net!news.misty.com!border2.nntp.dca1.giganews.com!nntp.giganews.com!news-out.google.com!nntp.google.com!postnews.google.com!google-groups.googlegroups.com!not-for-mail
Newsgroups: comp.arch
Date: Thu, 30 Dec 2021 14:37:45 -0800 (PST)
In-Reply-To: <sql73d$6es$2@newsreader4.netcologne.de>
Injection-Info: google-groups.googlegroups.com; posting-host=2600:1700:291:29f0:7c95:1043:36c7:2208;
posting-account=H_G_JQkAAADS6onOMb-dqvUozKse7mcM
NNTP-Posting-Host: 2600:1700:291:29f0:7c95:1043:36c7:2208
References: <2021Dec24.163843@mips.complang.tuwien.ac.at> <sq5dj1$1q9$1@dont-email.me>
<59376149-c3d3-489e-8b41-f21bdd0ce5a9n@googlegroups.com> <sqkcvk$n97$1@dont-email.me>
<RrlzJ.130558$SR4.25229@fx43.iad> <sql2cm$3h7$1@dont-email.me> <sql73d$6es$2@newsreader4.netcologne.de>
User-Agent: G2/1.0
MIME-Version: 1.0
Message-ID: <7c191722-66f5-417a-855b-976cafd1b770n@googlegroups.com>
Subject: Re: RISC-V vs. Aarch64
From: MitchAl...@aol.com (MitchAlsup)
Injection-Date: Thu, 30 Dec 2021 22:37:45 +0000
Content-Type: text/plain; charset="UTF-8"
Lines: 41
 by: MitchAlsup - Thu, 30 Dec 2021 22:37 UTC

On Thursday, December 30, 2021 at 3:07:59 PM UTC-6, Thomas Koenig wrote:
> Marcus <m.de...@this.bitsnbites.eu> schrieb:
> > On 2021-12-30, EricP wrote:
>
> >> C,C++ and a bunch of languages explicitly define booleans as 0 or 1
> >> so this definition won't be optimal for those languages.
> >> VAX Fortran used 0,-1 for LOGICAL but I don't know if that
> >> was defined by the language or implementation dependant.
> It is implementation defined.
>
> With GNU Fortran, the choice was made to only allow 0 and 1.
> Anything else, and you're likely to end up with random results
> with LOGICAL variables.
>
> One reason for that was that gcc, still a C-centric compiler, is
> geared toward _Bool. Fortran has followed, because the C interop
> sort of prescribes that.
> > As a software developer I'm painfully aware of this. I decided not to
> > care too much about it, though. Really, most software that relies on
> > this property of C should be frowned upon. E.g. expressions like:
> >
> > a = b + (c == d);
> >
> > ...aren't really good programming practice.
> Agreed.
> > I have seen a few places where the compiler does conversions from -1 to
> > +1 (but those have mostly been due to missing/bad pattern matching in
> > the machine description).
> What is the assembly for
>
> _Bool foo (int a, int b)
> {
> return a > b;
> }
>
> for your architecture at a reasonable optimization level?
< O=0
ENTRY foo
foo:
CMP R1,R1,R2
EXT R1,R1,#<GT>
RET

Re: RISC-V vs. Aarch64

<sqld4s$gc3$1@dont-email.me>

  copy mid

https://www.novabbs.com/devel/article-flat.php?id=22633&group=comp.arch#22633

  copy link   Newsgroups: comp.arch
Path: i2pn2.org!i2pn.org!eternal-september.org!reader02.eternal-september.org!.POSTED!not-for-mail
From: cr88...@gmail.com (BGB)
Newsgroups: comp.arch
Subject: Re: RISC-V vs. Aarch64
Date: Thu, 30 Dec 2021 16:51:07 -0600
Organization: A noiseless patient Spider
Lines: 55
Message-ID: <sqld4s$gc3$1@dont-email.me>
References: <2021Dec24.163843@mips.complang.tuwien.ac.at>
<sq5dj1$1q9$1@dont-email.me>
<59376149-c3d3-489e-8b41-f21bdd0ce5a9n@googlegroups.com>
<sqkcvk$n97$1@dont-email.me> <RrlzJ.130558$SR4.25229@fx43.iad>
<sql2cm$3h7$1@dont-email.me> <sql73d$6es$2@newsreader4.netcologne.de>
<7c191722-66f5-417a-855b-976cafd1b770n@googlegroups.com>
Mime-Version: 1.0
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: 7bit
Injection-Date: Thu, 30 Dec 2021 22:51:08 -0000 (UTC)
Injection-Info: reader02.eternal-september.org; posting-host="94d123a6a3772585eabf4ec6ac39afd6";
logging-data="16771"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX18dsuMZu8bHeBHpnBJkeoZ2"
User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101
Thunderbird/91.4.1
Cancel-Lock: sha1:cJqWoC5wBEmB/ZyObQMiYjiY/ZQ=
In-Reply-To: <7c191722-66f5-417a-855b-976cafd1b770n@googlegroups.com>
Content-Language: en-US
 by: BGB - Thu, 30 Dec 2021 22:51 UTC

On 12/30/2021 4:37 PM, MitchAlsup wrote:
> On Thursday, December 30, 2021 at 3:07:59 PM UTC-6, Thomas Koenig wrote:
>> Marcus <m.de...@this.bitsnbites.eu> schrieb:
>>> On 2021-12-30, EricP wrote:
>>
>>>> C,C++ and a bunch of languages explicitly define booleans as 0 or 1
>>>> so this definition won't be optimal for those languages.
>>>> VAX Fortran used 0,-1 for LOGICAL but I don't know if that
>>>> was defined by the language or implementation dependant.
>> It is implementation defined.
>>
>> With GNU Fortran, the choice was made to only allow 0 and 1.
>> Anything else, and you're likely to end up with random results
>> with LOGICAL variables.
>>
>> One reason for that was that gcc, still a C-centric compiler, is
>> geared toward _Bool. Fortran has followed, because the C interop
>> sort of prescribes that.
>>> As a software developer I'm painfully aware of this. I decided not to
>>> care too much about it, though. Really, most software that relies on
>>> this property of C should be frowned upon. E.g. expressions like:
>>>
>>> a = b + (c == d);
>>>
>>> ...aren't really good programming practice.
>> Agreed.
>>> I have seen a few places where the compiler does conversions from -1 to
>>> +1 (but those have mostly been due to missing/bad pattern matching in
>>> the machine description).
>> What is the assembly for
>>
>> _Bool foo (int a, int b)
>> {
>> return a > b;
>> }
>>
>> for your architecture at a reasonable optimization level?
> < O=0
> ENTRY foo
> foo:
> CMP R1,R1,R2
> EXT R1,R1,#<GT>
> RET

My case:
foo:
CMPGT R5, R4
MOVT R2
RTS

CMPGT updates SR.T based on the compare.
MOVT copies SR.T to a register.
MOVNT copies !SR.T to a register.

Re: RISC-V vs. Aarch64

<0001HW.277E7C1403056B2A7000096C738F@news.individual.net>

  copy mid

https://www.novabbs.com/devel/article-flat.php?id=22634&group=comp.arch#22634

  copy link   Newsgroups: comp.arch
Path: i2pn2.org!i2pn.org!news.swapon.de!fu-berlin.de!uni-berlin.de!individual.net!not-for-mail
From: findlayb...@blueyonder.co.uk (Bill Findlay)
Newsgroups: comp.arch
Subject: Re: RISC-V vs. Aarch64
Date: Thu, 30 Dec 2021 23:45:24 +0000
Organization: none
Lines: 32
Message-ID: <0001HW.277E7C1403056B2A7000096C738F@news.individual.net>
References: <2021Dec24.163843@mips.complang.tuwien.ac.at> <sq5dj1$1q9$1@dont-email.me> <59376149-c3d3-489e-8b41-f21bdd0ce5a9n@googlegroups.com> <sqkcvk$n97$1@dont-email.me> <RrlzJ.130558$SR4.25229@fx43.iad> <sql2cm$3h7$1@dont-email.me> <f83def06-e4ee-4a89-897c-d115133b0ef6n@googlegroups.com> <j36lq7Ff1hsU1@mid.individual.net>
Reply-To: findlaybill@blueyonder.co.uk
Mime-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
X-Trace: individual.net ddudxeukW/xN4aG8a/vRBgNRF9DEqQ0cMC/2XCbHwpY1GsyAhU
X-Orig-Path: not-for-mail
Cancel-Lock: sha1:zVB8uua+GI35+DUVRb+o27AGREk=
User-Agent: Hogwasher/5.24
 by: Bill Findlay - Thu, 30 Dec 2021 23:45 UTC

On 30 Dec 2021, Niklas Holsti wrote
(in article <j36lq7Ff1hsU1@mid.individual.net>):

> On 2021-12-30 22:34, MitchAlsup wrote:
> > On Thursday, December 30, 2021 at 1:47:36 PM UTC-6, Marcus wrote:
> > > On 2021-12-30, EricP wrote:
>
> [snip]
>
> > > > C,C++ and a bunch of languages explicitly define booleans as 0 or 1
> > > > so this definition won't be optimal for those languages.
> > > > VAX Fortran used 0,-1 for LOGICAL but I don't know if that
> > > > was defined by the language or implementation dependant.
> > <
> > IIRC Pascal uses 0 and -1
>
> Pascal-the-language has a "boolean" type, with values False and True. I
> believe the machine representation of those values is
> implementation-defined.

Pascal requires that false< true, that true = succ(false), that false =
pred(true),
that ord(false) = 0, and that ord(true) = 1, where succ(), pred() and ord()
are
equivalent to Boolean'Succ(),Boolean'Pred() and Boolean'Pos() in Ada.
This does not enforce representations of 0 and 1, but it's a pretty strong
hint!

--
Bill Findlay

Re: RISC-V vs. Aarch64

<08710242-9cba-441f-98ff-93a7bfb1d35cn@googlegroups.com>

  copy mid

https://www.novabbs.com/devel/article-flat.php?id=22635&group=comp.arch#22635

  copy link   Newsgroups: comp.arch
X-Received: by 2002:ae9:ef4b:: with SMTP id d72mr22984369qkg.690.1640909320263;
Thu, 30 Dec 2021 16:08:40 -0800 (PST)
X-Received: by 2002:a05:6830:438f:: with SMTP id s15mr13740181otv.243.1640909319994;
Thu, 30 Dec 2021 16:08:39 -0800 (PST)
Path: i2pn2.org!i2pn.org!weretis.net!feeder6.news.weretis.net!news.misty.com!border2.nntp.dca1.giganews.com!nntp.giganews.com!news-out.google.com!nntp.google.com!postnews.google.com!google-groups.googlegroups.com!not-for-mail
Newsgroups: comp.arch
Date: Thu, 30 Dec 2021 16:08:39 -0800 (PST)
In-Reply-To: <0001HW.277E7C1403056B2A7000096C738F@news.individual.net>
Injection-Info: google-groups.googlegroups.com; posting-host=2600:1700:291:29f0:7c95:1043:36c7:2208;
posting-account=H_G_JQkAAADS6onOMb-dqvUozKse7mcM
NNTP-Posting-Host: 2600:1700:291:29f0:7c95:1043:36c7:2208
References: <2021Dec24.163843@mips.complang.tuwien.ac.at> <sq5dj1$1q9$1@dont-email.me>
<59376149-c3d3-489e-8b41-f21bdd0ce5a9n@googlegroups.com> <sqkcvk$n97$1@dont-email.me>
<RrlzJ.130558$SR4.25229@fx43.iad> <sql2cm$3h7$1@dont-email.me>
<f83def06-e4ee-4a89-897c-d115133b0ef6n@googlegroups.com> <j36lq7Ff1hsU1@mid.individual.net>
<0001HW.277E7C1403056B2A7000096C738F@news.individual.net>
User-Agent: G2/1.0
MIME-Version: 1.0
Message-ID: <08710242-9cba-441f-98ff-93a7bfb1d35cn@googlegroups.com>
Subject: Re: RISC-V vs. Aarch64
From: MitchAl...@aol.com (MitchAlsup)
Injection-Date: Fri, 31 Dec 2021 00:08:40 +0000
Content-Type: text/plain; charset="UTF-8"
Lines: 31
 by: MitchAlsup - Fri, 31 Dec 2021 00:08 UTC

On Thursday, December 30, 2021 at 5:45:28 PM UTC-6, Bill Findlay wrote:
> On 30 Dec 2021, Niklas Holsti wrote
> (in article <j36lq7...@mid.individual.net>):
> > On 2021-12-30 22:34, MitchAlsup wrote:
> > > On Thursday, December 30, 2021 at 1:47:36 PM UTC-6, Marcus wrote:
> > > > On 2021-12-30, EricP wrote:
> >
> > [snip]
> >
> > > > > C,C++ and a bunch of languages explicitly define booleans as 0 or 1
> > > > > so this definition won't be optimal for those languages.
> > > > > VAX Fortran used 0,-1 for LOGICAL but I don't know if that
> > > > > was defined by the language or implementation dependant.
> > > <
> > > IIRC Pascal uses 0 and -1
> >
> > Pascal-the-language has a "boolean" type, with values False and True. I
> > believe the machine representation of those values is
> > implementation-defined.
> Pascal requires that false< true, that true = succ(false), that false =
> pred(true),
> that ord(false) = 0, and that ord(true) = 1, where succ(), pred() and ord()
> are
> equivalent to Boolean'Succ(),Boolean'Pred() and Boolean'Pos() in Ada.
> This does not enforce representations of 0 and 1, but it's a pretty strong
> hint!
<
There are sorts of ring-sum arithmetics which can emulate these requirements;
just not very many that can be efficiently calculated in 2-s complement.
>
> --
> Bill Findlay

Re: RISC-V vs. Aarch64

<sqm0lo$g2i$1@dont-email.me>

  copy mid

https://www.novabbs.com/devel/article-flat.php?id=22637&group=comp.arch#22637

  copy link   Newsgroups: comp.arch
Path: i2pn2.org!i2pn.org!eternal-september.org!reader02.eternal-september.org!.POSTED!not-for-mail
From: iva...@millcomputing.com (Ivan Godard)
Newsgroups: comp.arch
Subject: Re: RISC-V vs. Aarch64
Date: Thu, 30 Dec 2021 20:24:23 -0800
Organization: A noiseless patient Spider
Lines: 38
Message-ID: <sqm0lo$g2i$1@dont-email.me>
References: <2021Dec24.163843@mips.complang.tuwien.ac.at>
<0a8ff16a-53de-420e-9c82-cfc9e87f62e9n@googlegroups.com>
<sqk7nc$dh0$1@dont-email.me>
<abf67f3c-3f7d-477a-a8fa-d739672648aen@googlegroups.com>
Mime-Version: 1.0
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: 7bit
Injection-Date: Fri, 31 Dec 2021 04:24:24 -0000 (UTC)
Injection-Info: reader02.eternal-september.org; posting-host="38239b0b0c4ef08355a77f5f6d42268a";
logging-data="16466"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX19dcUFi5MN+PVbroUoy7X4U"
User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101
Thunderbird/91.4.1
Cancel-Lock: sha1:7DkjmlZNv4pNoWC+zIw6y8dRbWQ=
In-Reply-To: <abf67f3c-3f7d-477a-a8fa-d739672648aen@googlegroups.com>
Content-Language: en-US
 by: Ivan Godard - Fri, 31 Dec 2021 04:24 UTC

On 12/30/2021 10:29 AM, MitchAlsup wrote:
> On Thursday, December 30, 2021 at 6:12:31 AM UTC-6, Marcus wrote:
>> On 2021-12-24, MitchAlsup wrote:
>>> On Friday, December 24, 2021 at 11:00:14 AM UTC-6, Anton Ertl wrote:
>>
>> [snip]
>>
>>>>
>>>> It's pretty obvious that a small implementation of RV64G is smaller
>>>> than a small implementation of A64, and adding the C extension to a
>>>> small implementation of RV64G (to turn it to RV64GC) is reported in
>>>> the talk IIRC (it's on the order of 700 transistors, so still cheap),
>>>> so you can get a small RV64GC cheaper than a small A64 implementation
>>>> and have similar code density.
>>> <
>>> Once you have constructed the register file(s), the integer, memory, and
>>> floating point units, the size of the fetcher and decoder is immaterial
>>> (noise).
>>> <
>>
>> How about branch misprediction penalty? My assumption is that a more
>> complex decoder is likely to require more pipeline stages in the front
>> end, which is likely to hurt when you get branch mispredictions, right?
> <
> The more pipeline stages one has, the less cost a decoder is.
> <
> The wider the pipeline, the higher the relative misprediction costs.
> <
> On the other hand, My team in 1990 figured out how to execute a predicted
> branch in cycle k and be inserting instructions into the execution window
> form the mispredicted direction in cycle k+1. You CAN make the repair
> cost zero cycles, you still eat the delay to calculation of mispredict cycles.

Well, sort of. You are expecting that both-paths predecode will catch
most of the misses, and that's true when the misses are from wrong
loop-counts. But it's not true for data-dependent open code, nor for a
lot of switches, or any poly code in general when the target fanout
exceeds the predecodable fanout. Short pipes help with everything.

Re: RISC-V vs. Aarch64

<sqm0t3$f4q$1@dont-email.me>

  copy mid

https://www.novabbs.com/devel/article-flat.php?id=22638&group=comp.arch#22638

  copy link   Newsgroups: comp.arch
Path: i2pn2.org!i2pn.org!eternal-september.org!reader02.eternal-september.org!.POSTED!not-for-mail
From: iva...@millcomputing.com (Ivan Godard)
Newsgroups: comp.arch
Subject: Re: RISC-V vs. Aarch64
Date: Thu, 30 Dec 2021 20:28:20 -0800
Organization: A noiseless patient Spider
Lines: 24
Message-ID: <sqm0t3$f4q$1@dont-email.me>
References: <2021Dec24.163843@mips.complang.tuwien.ac.at>
<sq5dj1$1q9$1@dont-email.me>
<59376149-c3d3-489e-8b41-f21bdd0ce5a9n@googlegroups.com>
<sqkcvk$n97$1@dont-email.me> <RrlzJ.130558$SR4.25229@fx43.iad>
<sql2cm$3h7$1@dont-email.me>
<f83def06-e4ee-4a89-897c-d115133b0ef6n@googlegroups.com>
<j36lq7Ff1hsU1@mid.individual.net>
Mime-Version: 1.0
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: 8bit
Injection-Date: Fri, 31 Dec 2021 04:28:19 -0000 (UTC)
Injection-Info: reader02.eternal-september.org; posting-host="38239b0b0c4ef08355a77f5f6d42268a";
logging-data="15514"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX18uFCVZXELQ+57yHGoWVThI"
User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101
Thunderbird/91.4.1
Cancel-Lock: sha1:2Om6+gTULmAz07bS2axkT3nqbbA=
In-Reply-To: <j36lq7Ff1hsU1@mid.individual.net>
Content-Language: en-US
 by: Ivan Godard - Fri, 31 Dec 2021 04:28 UTC

On 12/30/2021 1:14 PM, Niklas Holsti wrote:
> On 2021-12-30 22:34, MitchAlsup wrote:
>> On Thursday, December 30, 2021 at 1:47:36 PM UTC-6, Marcus wrote:
>>> On 2021-12-30, EricP wrote:
>
>    [snip]
>
>>>> C,C++ and a bunch of languages explicitly define booleans as 0 or 1
>>>> so this definition won't be optimal for those languages.
>>>> VAX Fortran used 0,-1 for LOGICAL but I don't know if that
>>>> was defined by the language or implementation dependant.
>> <
>> IIRC Pascal uses 0 and -1
>
>
> Pascal-the-language has a "boolean" type, with values False and True. I
> believe the machine representation of those values is
> implementation-defined.
>
> Ada-the-language also has a "Boolean" type, with values False and True,
> but it is defined as an enumeration type with the default representation
> of such types, which means that False is represented as 0 and True as 1.

Yeah. IIRC, that was one I had to beat Jean-Claude up about.

Re: RISC-V vs. Aarch64

<sqm1i8$v9p$1@dont-email.me>

  copy mid

https://www.novabbs.com/devel/article-flat.php?id=22639&group=comp.arch#22639

  copy link   Newsgroups: comp.arch
Path: i2pn2.org!i2pn.org!eternal-september.org!reader02.eternal-september.org!.POSTED!not-for-mail
From: iva...@millcomputing.com (Ivan Godard)
Newsgroups: comp.arch
Subject: Re: RISC-V vs. Aarch64
Date: Thu, 30 Dec 2021 20:39:35 -0800
Organization: A noiseless patient Spider
Lines: 18
Message-ID: <sqm1i8$v9p$1@dont-email.me>
References: <2021Dec24.163843@mips.complang.tuwien.ac.at>
<sq5dj1$1q9$1@dont-email.me>
<59376149-c3d3-489e-8b41-f21bdd0ce5a9n@googlegroups.com>
<sqkcvk$n97$1@dont-email.me> <RrlzJ.130558$SR4.25229@fx43.iad>
<sql2cm$3h7$1@dont-email.me> <sql73d$6es$2@newsreader4.netcologne.de>
Mime-Version: 1.0
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: 7bit
Injection-Date: Fri, 31 Dec 2021 04:39:36 -0000 (UTC)
Injection-Info: reader02.eternal-september.org; posting-host="38239b0b0c4ef08355a77f5f6d42268a";
logging-data="32057"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX18l5AtCcyo6+nZQOW33/3Lv"
User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101
Thunderbird/91.4.1
Cancel-Lock: sha1:wYulCwvFVNY61+PzcOK2tOrKUMo=
In-Reply-To: <sql73d$6es$2@newsreader4.netcologne.de>
Content-Language: en-US
 by: Ivan Godard - Fri, 31 Dec 2021 04:39 UTC

On 12/30/2021 1:07 PM, Thomas Koenig wrote:

> What is the assembly for
>
> _Bool foo (int a, int b)
> {
> return a > b;
> }
>
> for your architecture at a reasonable optimization level?

F("foo") %0 %1;
retn(b0 %2) ^9, // L3C2F0
gtrsb(b0 %0, b1 %1) %2 ^8;
// L3C11F0=/home/ivan/mill/specializer/src/test1.c
//0: |i v%1 v%0 |o ^%0 ^%1 |d v%2 |w ^%2

Optlevel -O0, two instructions, one bundle, one cycle.

Re: RISC-V vs. Aarch64

<sqmj5j$s31$1@dont-email.me>

  copy mid

https://www.novabbs.com/devel/article-flat.php?id=22640&group=comp.arch#22640

  copy link   Newsgroups: comp.arch
Path: i2pn2.org!i2pn.org!eternal-september.org!reader02.eternal-september.org!.POSTED!not-for-mail
From: m.del...@this.bitsnbites.eu (Marcus)
Newsgroups: comp.arch
Subject: Re: RISC-V vs. Aarch64
Date: Fri, 31 Dec 2021 10:40:02 +0100
Organization: A noiseless patient Spider
Lines: 83
Message-ID: <sqmj5j$s31$1@dont-email.me>
References: <2021Dec24.163843@mips.complang.tuwien.ac.at>
<sq5dj1$1q9$1@dont-email.me>
<59376149-c3d3-489e-8b41-f21bdd0ce5a9n@googlegroups.com>
<sqkcvk$n97$1@dont-email.me> <RrlzJ.130558$SR4.25229@fx43.iad>
<sql2cm$3h7$1@dont-email.me> <sql73d$6es$2@newsreader4.netcologne.de>
Mime-Version: 1.0
Content-Type: text/plain; charset=windows-1252; format=flowed
Content-Transfer-Encoding: 7bit
Injection-Date: Fri, 31 Dec 2021 09:40:03 -0000 (UTC)
Injection-Info: reader02.eternal-september.org; posting-host="fec78306e793eadb5c409dad2d5049b8";
logging-data="28769"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX18DOJ0B4vLuRXhCUgVXfG5TIW9SctHPmKo="
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101
Thunderbird/78.14.0
Cancel-Lock: sha1:B280ijBcH8YS6K4wsTIhs0DIQ7Q=
In-Reply-To: <sql73d$6es$2@newsreader4.netcologne.de>
Content-Language: en-US
 by: Marcus - Fri, 31 Dec 2021 09:40 UTC

On 2021-12-30 22:07, Thomas Koenig wrote:
> Marcus <m.delete@this.bitsnbites.eu> schrieb:
>> On 2021-12-30, EricP wrote:
>
>>> C,C++ and a bunch of languages explicitly define booleans as 0 or 1
>>> so this definition won't be optimal for those languages.
>>> VAX Fortran used 0,-1 for LOGICAL but I don't know if that
>>> was defined by the language or implementation dependant.
>
> It is implementation defined.
>
> With GNU Fortran, the choice was made to only allow 0 and 1.
> Anything else, and you're likely to end up with random results
> with LOGICAL variables.
>
> One reason for that was that gcc, still a C-centric compiler, is
> geared toward _Bool. Fortran has followed, because the C interop
> sort of prescribes that.
>
>> As a software developer I'm painfully aware of this. I decided not to
>> care too much about it, though. Really, most software that relies on
>> this property of C should be frowned upon. E.g. expressions like:
>>
>> a = b + (c == d);
>>
>> ...aren't really good programming practice.
>
> Agreed.
>
>> I have seen a few places where the compiler does conversions from -1 to
>> +1 (but those have mostly been due to missing/bad pattern matching in
>> the machine description).
>
> What is the assembly for
>
> _Bool foo (int a, int b)
> {
> return a > b;
> }
>
> for your architecture at a reasonable optimization level?
>

As a matter of fact, you can now try out MRISC32 on Compiler Explorer
(support was added about a week ago): https://godbolt.org/z/z9sK3MYeM

MRISC32:
slt r1,r2,r1
sub r1,z,r1
ret

Two instructions: compare + convert from -1 to +1.

But I'm not too concerned. MIPS and RISC-V can do that in a single
instruction, but most popular architectures require at least two
instructions.

x86:
cmp edi, esi
setg al
ret

ARMv8:
cmp w0, w1
cset w0, gt
ret

ARMv7:
mov r2, #0
cmp r0, r1
movgt r2, #1
mov r0, r2
bx lr

POWER:
subf 3,3,4
srdi 3,3,63
blr

....etc.

/Marcus

Re: RISC-V vs. Aarch64

<sqmm0h$446$1@newsreader4.netcologne.de>

  copy mid

https://www.novabbs.com/devel/article-flat.php?id=22641&group=comp.arch#22641

  copy link   Newsgroups: comp.arch
Path: i2pn2.org!i2pn.org!weretis.net!feeder8.news.weretis.net!newsreader4.netcologne.de!news.netcologne.de!.POSTED.2001-4dd7-eb03-0-7285-c2ff-fe6c-992d.ipv6dyn.netcologne.de!not-for-mail
From: tkoe...@netcologne.de (Thomas Koenig)
Newsgroups: comp.arch
Subject: Re: RISC-V vs. Aarch64
Date: Fri, 31 Dec 2021 10:28:33 -0000 (UTC)
Organization: news.netcologne.de
Distribution: world
Message-ID: <sqmm0h$446$1@newsreader4.netcologne.de>
References: <2021Dec24.163843@mips.complang.tuwien.ac.at>
<sq5dj1$1q9$1@dont-email.me>
<59376149-c3d3-489e-8b41-f21bdd0ce5a9n@googlegroups.com>
<sqkcvk$n97$1@dont-email.me> <RrlzJ.130558$SR4.25229@fx43.iad>
<sql2cm$3h7$1@dont-email.me> <sql73d$6es$2@newsreader4.netcologne.de>
<sqm1i8$v9p$1@dont-email.me>
Injection-Date: Fri, 31 Dec 2021 10:28:33 -0000 (UTC)
Injection-Info: newsreader4.netcologne.de; posting-host="2001-4dd7-eb03-0-7285-c2ff-fe6c-992d.ipv6dyn.netcologne.de:2001:4dd7:eb03:0:7285:c2ff:fe6c:992d";
logging-data="4230"; mail-complaints-to="abuse@netcologne.de"
User-Agent: slrn/1.0.3 (Linux)
 by: Thomas Koenig - Fri, 31 Dec 2021 10:28 UTC

Ivan Godard <ivan@millcomputing.com> schrieb:
> On 12/30/2021 1:07 PM, Thomas Koenig wrote:
>
>> What is the assembly for
>>
>> _Bool foo (int a, int b)
>> {
>> return a > b;
>> }
>>
>> for your architecture at a reasonable optimization level?
>
> F("foo") %0 %1;
> retn(b0 %2) ^9, // L3C2F0
> gtrsb(b0 %0, b1 %1) %2 ^8;
> // L3C11F0=/home/ivan/mill/specializer/src/test1.c
> //0: |i v%1 v%0 |o ^%0 ^%1 |d v%2 |w ^%2

Could you decipher this for the non-initialized? :-)

Re: RISC-V vs. Aarch64

<sqmmso$446$2@newsreader4.netcologne.de>

  copy mid

https://www.novabbs.com/devel/article-flat.php?id=22642&group=comp.arch#22642

  copy link   Newsgroups: comp.arch
Path: i2pn2.org!i2pn.org!paganini.bofh.team!news.dns-netz.com!news.freedyn.de!newsreader4.netcologne.de!news.netcologne.de!.POSTED.2001-4dd7-eb03-0-7285-c2ff-fe6c-992d.ipv6dyn.netcologne.de!not-for-mail
From: tkoe...@netcologne.de (Thomas Koenig)
Newsgroups: comp.arch
Subject: Re: RISC-V vs. Aarch64
Date: Fri, 31 Dec 2021 10:43:36 -0000 (UTC)
Organization: news.netcologne.de
Distribution: world
Message-ID: <sqmmso$446$2@newsreader4.netcologne.de>
References: <2021Dec24.163843@mips.complang.tuwien.ac.at>
<sq5dj1$1q9$1@dont-email.me>
<59376149-c3d3-489e-8b41-f21bdd0ce5a9n@googlegroups.com>
<sqkcvk$n97$1@dont-email.me> <RrlzJ.130558$SR4.25229@fx43.iad>
<sql2cm$3h7$1@dont-email.me> <sql73d$6es$2@newsreader4.netcologne.de>
<sqmj5j$s31$1@dont-email.me>
Injection-Date: Fri, 31 Dec 2021 10:43:36 -0000 (UTC)
Injection-Info: newsreader4.netcologne.de; posting-host="2001-4dd7-eb03-0-7285-c2ff-fe6c-992d.ipv6dyn.netcologne.de:2001:4dd7:eb03:0:7285:c2ff:fe6c:992d";
logging-data="4230"; mail-complaints-to="abuse@netcologne.de"
User-Agent: slrn/1.0.3 (Linux)
 by: Thomas Koenig - Fri, 31 Dec 2021 10:43 UTC

Marcus <m.delete@this.bitsnbites.eu> schrieb:
> On 2021-12-30 22:07, Thomas Koenig wrote:

>> What is the assembly for
>>
>> _Bool foo (int a, int b)
>> {
>> return a > b;
>> }
>>
>> for your architecture at a reasonable optimization level?
>>
>
> As a matter of fact, you can now try out MRISC32 on Compiler Explorer
> (support was added about a week ago): https://godbolt.org/z/z9sK3MYeM

That is so cool, I think I will throw some code at it and
see how this works out :-)

>
> MRISC32:
> slt r1,r2,r1
> sub r1,z,r1
> ret
>
> Two instructions: compare + convert from -1 to +1.

Looks good.

>
> But I'm not too concerned. MIPS and RISC-V can do that in a single
> instruction, but most popular architectures require at least two
> instructions.

It is actually quite interesting to see the different approaches
the different architectures do

> x86:
> cmp edi, esi
> setg al
> ret

Setting a register from a condition code...

> ARMv8:
> cmp w0, w1
> cset w0, gt
> ret

Same thing here.

> ARMv7:
> mov r2, #0
> cmp r0, r1
> movgt r2, #1
> mov r0, r2
> bx lr

Set the register, compare, set another register, and copy
the register to the return register.

gcc does

cmp r0, r1
ite le
movle r0, #0
movgt r0, #1
bx lr

which looks a little bit better (especially since ite seems
to be a pseudo-op in 32-bit mode, if I read that correctly).

> POWER:
> subf 3,3,4
> srdi 3,3,63
> blr

Subtract and right shift of the sign bit. That's another
way of doing this, I guess. When I saw this, I thought
"Somebody must have been feeling hackish"...

Re: RISC-V vs. Aarch64

<sqmsqq$14kp$1@gioia.aioe.org>

  copy mid

https://www.novabbs.com/devel/article-flat.php?id=22643&group=comp.arch#22643

  copy link   Newsgroups: comp.arch
Path: i2pn2.org!i2pn.org!aioe.org!rd9pRsUZyxkRLAEK7e/Uzw.user.46.165.242.91.POSTED!not-for-mail
From: terje.ma...@tmsw.no (Terje Mathisen)
Newsgroups: comp.arch
Subject: Re: RISC-V vs. Aarch64
Date: Fri, 31 Dec 2021 13:24:58 +0100
Organization: Aioe.org NNTP Server
Message-ID: <sqmsqq$14kp$1@gioia.aioe.org>
References: <2021Dec24.163843@mips.complang.tuwien.ac.at>
<sq5dj1$1q9$1@dont-email.me>
<59376149-c3d3-489e-8b41-f21bdd0ce5a9n@googlegroups.com>
<sqkcvk$n97$1@dont-email.me> <RrlzJ.130558$SR4.25229@fx43.iad>
<sql2cm$3h7$1@dont-email.me>
Mime-Version: 1.0
Content-Type: text/plain; charset=ISO-8859-1; format=flowed
Content-Transfer-Encoding: 8bit
Injection-Info: gioia.aioe.org; logging-data="37529"; posting-host="rd9pRsUZyxkRLAEK7e/Uzw.user.gioia.aioe.org"; mail-complaints-to="abuse@aioe.org";
User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:68.0) Gecko/20100101
Firefox/68.0 SeaMonkey/2.53.10.1
X-Notice: Filtered by postfilter v. 0.9.2
 by: Terje Mathisen - Fri, 31 Dec 2021 12:24 UTC

Marcus wrote:
> On 2021-12-30, EricP wrote:
>> C,C++ and a bunch of languages explicitly define booleans as 0 or 1
>> so this definition won't be optimal for those languages.
>> VAX Fortran used 0,-1 for LOGICAL but I don't know if that
>> was defined by the language or implementation dependant.

-1 is better than 1, it can be used as a mask.

>
> As a software developer I'm painfully aware of this. I decided not to
> care too much about it, though. Really, most software that relies on
> this property of C should be frowned upon. E.g. expressions like:
>
>   a = b + (c == d);
>
> ...aren't really good programming practice.

No! Please tell me it ain't so!

I use that type of constructs all over the place when writing branchless
code/doing table lookups etc.

The Dec 24th Advent of Code puzzle had a miniature ALU with no MOV, so
it used "x MUL 0" to zero out x, then x ADD N to actually set it to a
value. X EQL W returned 1/0, which was subsequently used in
multiplications to stand in for branches.

Terje

--
- <Terje.Mathisen at tmsw.no>
"almost all programming can be viewed as an exercise in caching"

Re: RISC-V vs. Aarch64

<sqmthh$2ea$1@dont-email.me>

  copy mid

https://www.novabbs.com/devel/article-flat.php?id=22644&group=comp.arch#22644

  copy link   Newsgroups: comp.arch
Path: i2pn2.org!i2pn.org!eternal-september.org!reader02.eternal-september.org!.POSTED!not-for-mail
From: m.del...@this.bitsnbites.eu (Marcus)
Newsgroups: comp.arch
Subject: Re: RISC-V vs. Aarch64
Date: Fri, 31 Dec 2021 13:37:04 +0100
Organization: A noiseless patient Spider
Lines: 57
Message-ID: <sqmthh$2ea$1@dont-email.me>
References: <2021Dec24.163843@mips.complang.tuwien.ac.at>
<sq5dj1$1q9$1@dont-email.me>
<59376149-c3d3-489e-8b41-f21bdd0ce5a9n@googlegroups.com>
<sqkcvk$n97$1@dont-email.me> <RrlzJ.130558$SR4.25229@fx43.iad>
<sql2cm$3h7$1@dont-email.me> <sqmsqq$14kp$1@gioia.aioe.org>
Mime-Version: 1.0
Content-Type: text/plain; charset=windows-1252; format=flowed
Content-Transfer-Encoding: 8bit
Injection-Date: Fri, 31 Dec 2021 12:37:05 -0000 (UTC)
Injection-Info: reader02.eternal-september.org; posting-host="fec78306e793eadb5c409dad2d5049b8";
logging-data="2506"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX18w2RMi4/C/vwGIu6OXVl060CI8r/5CPX4="
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101
Thunderbird/78.14.0
Cancel-Lock: sha1:3GDJPsIYWj0tLnbfJMKyk8dceu4=
In-Reply-To: <sqmsqq$14kp$1@gioia.aioe.org>
Content-Language: en-US
 by: Marcus - Fri, 31 Dec 2021 12:37 UTC

On 2021-12-31, Terje Mathisen wrote:
> Marcus wrote:
>> On 2021-12-30, EricP wrote:
>>> C,C++ and a bunch of languages explicitly define booleans as 0 or 1
>>> so this definition won't be optimal for those languages.
>>> VAX Fortran used 0,-1 for LOGICAL but I don't know if that
>>> was defined by the language or implementation dependant.
>
> -1 is better than 1, it can be used as a mask.
>
>>
>> As a software developer I'm painfully aware of this. I decided not to
>> care too much about it, though. Really, most software that relies on
>> this property of C should be frowned upon. E.g. expressions like:
>>
>>    a = b + (c == d);
>>
>> ...aren't really good programming practice.
>
> No! Please tell me it ain't so!

:-)

>
> I use that type of constructs all over the place when writing branchless
> code/doing table lookups etc.

I think that you'll find that the following code produces the exact same
result:

int a;
if (c == d) {
a = b + 1;
} else {
a = b;
}

It too is completely branchless.

My main gripe with the former version is the implicit type conversion
(boolean to integer), and that I don't like to see logical operands and
arithmetic operands mixed in the same expression. Another slightly more
readable version, IMO, would be:

a = b + (c == d ? 1 : 0);

See: https://godbolt.org/z/K7ndn57T1

>
> The Dec 24th Advent of Code puzzle had a miniature ALU with no MOV, so
> it used "x MUL 0" to zero out x, then x ADD N to actually set it to a
> value. X EQL W returned 1/0, which was subsequently used in
> multiplications to stand in for branches.
>
> Terje
>

MRISC32 vectorization (was: RISC-V vs. Aarch64)

<sqmtil$9jq$1@newsreader4.netcologne.de>

  copy mid

https://www.novabbs.com/devel/article-flat.php?id=22645&group=comp.arch#22645

  copy link   Newsgroups: comp.arch
Path: i2pn2.org!i2pn.org!paganini.bofh.team!news.dns-netz.com!news.freedyn.de!newsreader4.netcologne.de!news.netcologne.de!.POSTED.2001-4dd7-eb03-0-7285-c2ff-fe6c-992d.ipv6dyn.netcologne.de!not-for-mail
From: tkoe...@netcologne.de (Thomas Koenig)
Newsgroups: comp.arch
Subject: MRISC32 vectorization (was: RISC-V vs. Aarch64)
Date: Fri, 31 Dec 2021 12:37:41 -0000 (UTC)
Organization: news.netcologne.de
Distribution: world
Message-ID: <sqmtil$9jq$1@newsreader4.netcologne.de>
References: <2021Dec24.163843@mips.complang.tuwien.ac.at>
<sq5dj1$1q9$1@dont-email.me>
<59376149-c3d3-489e-8b41-f21bdd0ce5a9n@googlegroups.com>
<sqkcvk$n97$1@dont-email.me> <RrlzJ.130558$SR4.25229@fx43.iad>
<sql2cm$3h7$1@dont-email.me> <sql73d$6es$2@newsreader4.netcologne.de>
<sqmj5j$s31$1@dont-email.me>
Injection-Date: Fri, 31 Dec 2021 12:37:41 -0000 (UTC)
Injection-Info: newsreader4.netcologne.de; posting-host="2001-4dd7-eb03-0-7285-c2ff-fe6c-992d.ipv6dyn.netcologne.de:2001:4dd7:eb03:0:7285:c2ff:fe6c:992d";
logging-data="9850"; mail-complaints-to="abuse@netcologne.de"
User-Agent: slrn/1.0.3 (Linux)
 by: Thomas Koenig - Fri, 31 Dec 2021 12:37 UTC

Marcus <m.delete@this.bitsnbites.eu> schrieb:

> As a matter of fact, you can now try out MRISC32 on Compiler Explorer
> (support was added about a week ago): https://godbolt.org/z/z9sK3MYeM

I could not help but start experimenting with that :-)

I seen no vectorization for

void foo(int * const restrict a, int * const restrict b, int * restrict c, int n)
{ for (int i=0; i<n; i++)
c[i] = a[i]+b[i];
}

and -fopt-info-vec-missed tells me, at https://godbolt.org/z/vPM3KTrnz ,
<source>:3:20: missed: couldn't vectorize loop
<source>:3:20: missed: not vectorized: unsupported data-type

so it seems some more delving into gcc's secret internals
will be required...

Re: RISC-V vs. Aarch64

<gs2dnRZj-ucyZ1P8nZ2dnUU78YfNnZ2d@supernews.com>

  copy mid

https://www.novabbs.com/devel/article-flat.php?id=22646&group=comp.arch#22646

  copy link   Newsgroups: comp.arch
Path: i2pn2.org!i2pn.org!paganini.bofh.team!news.dns-netz.com!news.freedyn.de!newsfeed.xs4all.nl!newsfeed8.news.xs4all.nl!border2.nntp.ams1.giganews.com!nntp.giganews.com!buffer2.nntp.ams1.giganews.com!nntp.supernews.com!news.supernews.com.POSTED!not-for-mail
NNTP-Posting-Date: Fri, 31 Dec 2021 06:42:23 -0600
Sender: Andrew Haley <aph@zarquon.pink>
From: aph...@littlepinkcloud.invalid
Subject: Re: RISC-V vs. Aarch64
Newsgroups: comp.arch
References: <2021Dec24.163843@mips.complang.tuwien.ac.at> <sq5dj1$1q9$1@dont-email.me> <59376149-c3d3-489e-8b41-f21bdd0ce5a9n@googlegroups.com> <sqkcvk$n97$1@dont-email.me> <RrlzJ.130558$SR4.25229@fx43.iad> <sql2cm$3h7$1@dont-email.me> <sql73d$6es$2@newsreader4.netcologne.de> <sqmj5j$s31$1@dont-email.me> <sqmmso$446$2@newsreader4.netcologne.de>
Distribution: world
User-Agent: tin/1.9.2-20070201 ("Dalaruan") (UNIX) (Linux/4.18.0-305.25.1.el8_4.x86_64 (x86_64))
Message-ID: <gs2dnRZj-ucyZ1P8nZ2dnUU78YfNnZ2d@supernews.com>
Date: Fri, 31 Dec 2021 06:42:23 -0600
Lines: 32
X-Trace: sv3-JLudCj2Nt8lSzsImaGOYT3FFhrGR3+idAS8hzGzrwLxj35n+63LV7Fnr3uXLzG2SKRYzs1Ur32+ONtW!Lh5vDZ08XWV/hC75KVcZOJEfoemBlKgG+u7W6WVIoDiIUWmWLBYDrouKzJBfDS2W11XuwVWEGTPv!hKRXemyU
X-Complaints-To: www.supernews.com/docs/abuse.html
X-DMCA-Complaints-To: www.supernews.com/docs/dmca.html
X-Abuse-and-DMCA-Info: Please be sure to forward a copy of ALL headers
X-Abuse-and-DMCA-Info: Otherwise we will be unable to process your complaint properly
X-Postfilter: 1.3.40
X-Original-Bytes: 2291
 by: aph...@littlepinkcloud.invalid - Fri, 31 Dec 2021 12:42 UTC

Thomas Koenig <tkoenig@netcologne.de> wrote:
> Marcus <m.delete@this.bitsnbites.eu> schrieb:
>> On 2021-12-30 22:07, Thomas Koenig wrote:
>
>>> What is the assembly for
>>>
>>> _Bool foo (int a, int b)
>>> {
>>> return a > b;
>>> }
>>>
>>> for your architecture at a reasonable optimization level?
>>>
>>
>> As a matter of fact, you can now try out MRISC32 on Compiler Explorer
>> (support was added about a week ago): https://godbolt.org/z/z9sK3MYeM
>
>> POWER:
>> subf 3,3,4
>> srdi 3,3,63
>> blr
>
> Subtract and right shift of the sign bit. That's another
> way of doing this, I guess. When I saw this, I thought
> "Somebody must have been feeling hackish"...

Is it even correct? Surely that's (b - a < 0), not (a > b). I think
it'd return true for foo(-0x7fffffff, 0x7fffffff). But I don't know
the POWER ISA at all well, so pls ignore if this is cleverer than I
think. :-).

Andrew.

Re: MRISC32 vectorization (was: RISC-V vs. Aarch64)

<sqmttb$4m9$1@dont-email.me>

  copy mid

https://www.novabbs.com/devel/article-flat.php?id=22647&group=comp.arch#22647

  copy link   Newsgroups: comp.arch
Path: i2pn2.org!i2pn.org!eternal-september.org!reader02.eternal-september.org!.POSTED!not-for-mail
From: m.del...@this.bitsnbites.eu (Marcus)
Newsgroups: comp.arch
Subject: Re: MRISC32 vectorization (was: RISC-V vs. Aarch64)
Date: Fri, 31 Dec 2021 13:43:22 +0100
Organization: A noiseless patient Spider
Lines: 41
Message-ID: <sqmttb$4m9$1@dont-email.me>
References: <2021Dec24.163843@mips.complang.tuwien.ac.at>
<sq5dj1$1q9$1@dont-email.me>
<59376149-c3d3-489e-8b41-f21bdd0ce5a9n@googlegroups.com>
<sqkcvk$n97$1@dont-email.me> <RrlzJ.130558$SR4.25229@fx43.iad>
<sql2cm$3h7$1@dont-email.me> <sql73d$6es$2@newsreader4.netcologne.de>
<sqmj5j$s31$1@dont-email.me> <sqmtil$9jq$1@newsreader4.netcologne.de>
Mime-Version: 1.0
Content-Type: text/plain; charset=windows-1252; format=flowed
Content-Transfer-Encoding: 7bit
Injection-Date: Fri, 31 Dec 2021 12:43:23 -0000 (UTC)
Injection-Info: reader02.eternal-september.org; posting-host="fec78306e793eadb5c409dad2d5049b8";
logging-data="4809"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX1/KvKYu0ZQe3Wzxj/HBWO1sh6BLqZaf9q0="
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101
Thunderbird/78.14.0
Cancel-Lock: sha1:IKZZA/bPssDNrgsiiCN0HwppNl0=
In-Reply-To: <sqmtil$9jq$1@newsreader4.netcologne.de>
Content-Language: en-US
 by: Marcus - Fri, 31 Dec 2021 12:43 UTC

On 2021-12-31, Thomas Koenig wrote:
> Marcus <m.delete@this.bitsnbites.eu> schrieb:
>
>> As a matter of fact, you can now try out MRISC32 on Compiler Explorer
>> (support was added about a week ago): https://godbolt.org/z/z9sK3MYeM
>
> I could not help but start experimenting with that :-)
>
> I seen no vectorization for
>
> void foo(int * const restrict a, int * const restrict b, int * restrict c, int n)
> {
> for (int i=0; i<n; i++)
> c[i] = a[i]+b[i];
> }
>
> and -fopt-info-vec-missed tells me, at https://godbolt.org/z/vPM3KTrnz ,
> <source>:3:20: missed: couldn't vectorize loop
> <source>:3:20: missed: not vectorized: unsupported data-type
>
> so it seems some more delving into gcc's secret internals
> will be required...
>

Yup! Vectorization is not at all implemented (the compiler doesn't even
know how to use the vector registers), so it's one of the more
interesting improvements to be done to the MRISC32 GCC machine
description.

Since I'm not a compiler guy (at all), I'm pretty happy that I've gotten
this far. Auto-vectorization is not on the near term roadmap,
unfortunately (things like better C++ support is higher up on the prio
list). Also, the vector part of the ISA is not really finalized yet.

Inline assembler is the solution for MRISC32 vector code. E.g:

https://github.com/mbitsnbites/mc1-doom/blob/master/src/r_draw.c#L89

/Marcus

Re: RISC-V vs. Aarch64

<sqmu6r$6c5$1@dont-email.me>

  copy mid

https://www.novabbs.com/devel/article-flat.php?id=22648&group=comp.arch#22648

  copy link   Newsgroups: comp.arch
Path: i2pn2.org!i2pn.org!eternal-september.org!reader02.eternal-september.org!.POSTED!not-for-mail
From: iva...@millcomputing.com (Ivan Godard)
Newsgroups: comp.arch
Subject: Re: RISC-V vs. Aarch64
Date: Fri, 31 Dec 2021 04:48:27 -0800
Organization: A noiseless patient Spider
Lines: 36
Message-ID: <sqmu6r$6c5$1@dont-email.me>
References: <2021Dec24.163843@mips.complang.tuwien.ac.at>
<sq5dj1$1q9$1@dont-email.me>
<59376149-c3d3-489e-8b41-f21bdd0ce5a9n@googlegroups.com>
<sqkcvk$n97$1@dont-email.me> <RrlzJ.130558$SR4.25229@fx43.iad>
<sql2cm$3h7$1@dont-email.me> <sql73d$6es$2@newsreader4.netcologne.de>
<sqm1i8$v9p$1@dont-email.me> <sqmm0h$446$1@newsreader4.netcologne.de>
Mime-Version: 1.0
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: 7bit
Injection-Date: Fri, 31 Dec 2021 12:48:28 -0000 (UTC)
Injection-Info: reader02.eternal-september.org; posting-host="38239b0b0c4ef08355a77f5f6d42268a";
logging-data="6533"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX1+cPrrpD0b9tJHrDycfeInB"
User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101
Thunderbird/91.4.1
Cancel-Lock: sha1:85wM7ICcshGShsW8gXeS7riK6f4=
In-Reply-To: <sqmm0h$446$1@newsreader4.netcologne.de>
Content-Language: en-US
 by: Ivan Godard - Fri, 31 Dec 2021 12:48 UTC

On 12/31/2021 2:28 AM, Thomas Koenig wrote:
> Ivan Godard <ivan@millcomputing.com> schrieb:
>> On 12/30/2021 1:07 PM, Thomas Koenig wrote:
>>
>>> What is the assembly for
>>>
>>> _Bool foo (int a, int b)
>>> {
>>> return a > b;
>>> }
>>>
>>> for your architecture at a reasonable optimization level?
>>
>> F("foo") %0 %1;
>> retn(b0 %2) ^9, // L3C2F0
>> gtrsb(b0 %0, b1 %1) %2 ^8;
>> // L3C11F0=/home/ivan/mill/specializer/src/test1.c
>> //0: |i v%1 v%0 |o ^%0 ^%1 |d v%2 |w ^%2
>
> Could you decipher this for the non-initialized? :-)

Sorry, it has all the annotations turned on, so the reader can see the
belt flow. A key:
L3C1F0 etc: source position (line # etc)
bN: belt reference to the Nth mot recent drop
%N: SSA # for drop
^N: instruction number in ebb
N: cycle number in ebb
|X: phase X (i: immPhase, o: opPhase d: dropPhase
w: writerPhase)
v%N: a drop of %N
^%N: an eval of %N

Removing all the annotations, you get:
F("foo");
retn(b0),gtrsb(b0, b1);

Re: RISC-V vs. Aarch64

<4bda9f71-5738-4009-97ec-45044b025e80n@googlegroups.com>

  copy mid

https://www.novabbs.com/devel/article-flat.php?id=22649&group=comp.arch#22649

  copy link   Newsgroups: comp.arch
X-Received: by 2002:ad4:5de9:: with SMTP id jn9mr31594804qvb.87.1640956677120;
Fri, 31 Dec 2021 05:17:57 -0800 (PST)
X-Received: by 2002:a9d:bf7:: with SMTP id 110mr25271123oth.94.1640956676866;
Fri, 31 Dec 2021 05:17:56 -0800 (PST)
Path: i2pn2.org!i2pn.org!weretis.net!feeder6.news.weretis.net!news.misty.com!border2.nntp.dca1.giganews.com!nntp.giganews.com!news-out.google.com!nntp.google.com!postnews.google.com!google-groups.googlegroups.com!not-for-mail
Newsgroups: comp.arch
Date: Fri, 31 Dec 2021 05:17:56 -0800 (PST)
In-Reply-To: <gs2dnRZj-ucyZ1P8nZ2dnUU78YfNnZ2d@supernews.com>
Injection-Info: google-groups.googlegroups.com; posting-host=2a0d:6fc2:55b0:ca00:f0ca:a00:bde2:2cc1;
posting-account=ow8VOgoAAAAfiGNvoH__Y4ADRwQF1hZW
NNTP-Posting-Host: 2a0d:6fc2:55b0:ca00:f0ca:a00:bde2:2cc1
References: <2021Dec24.163843@mips.complang.tuwien.ac.at> <sq5dj1$1q9$1@dont-email.me>
<59376149-c3d3-489e-8b41-f21bdd0ce5a9n@googlegroups.com> <sqkcvk$n97$1@dont-email.me>
<RrlzJ.130558$SR4.25229@fx43.iad> <sql2cm$3h7$1@dont-email.me>
<sql73d$6es$2@newsreader4.netcologne.de> <sqmj5j$s31$1@dont-email.me>
<sqmmso$446$2@newsreader4.netcologne.de> <gs2dnRZj-ucyZ1P8nZ2dnUU78YfNnZ2d@supernews.com>
User-Agent: G2/1.0
MIME-Version: 1.0
Message-ID: <4bda9f71-5738-4009-97ec-45044b025e80n@googlegroups.com>
Subject: Re: RISC-V vs. Aarch64
From: already5...@yahoo.com (Michael S)
Injection-Date: Fri, 31 Dec 2021 13:17:57 +0000
Content-Type: text/plain; charset="UTF-8"
Lines: 34
 by: Michael S - Fri, 31 Dec 2021 13:17 UTC

On Friday, December 31, 2021 at 2:43:28 PM UTC+2, a...@littlepinkcloud.invalid wrote:
> Thomas Koenig <tko...@netcologne.de> wrote:
> > Marcus <m.de...@this.bitsnbites.eu> schrieb:
> >> On 2021-12-30 22:07, Thomas Koenig wrote:
> >
> >>> What is the assembly for
> >>>
> >>> _Bool foo (int a, int b)
> >>> {
> >>> return a > b;
> >>> }
> >>>
> >>> for your architecture at a reasonable optimization level?
> >>>
> >>
> >> As a matter of fact, you can now try out MRISC32 on Compiler Explorer
> >> (support was added about a week ago): https://godbolt.org/z/z9sK3MYeM
> >
> >> POWER:
> >> subf 3,3,4
> >> srdi 3,3,63
> >> blr
> >
> > Subtract and right shift of the sign bit. That's another
> > way of doing this, I guess. When I saw this, I thought
> > "Somebody must have been feeling hackish"...
> Is it even correct? Surely that's (b - a < 0), not (a > b). I think
> it'd return true for foo(-0x7fffffff, 0x7fffffff). But I don't know
> the POWER ISA at all well, so pls ignore if this is cleverer than I
> think. :-).
>
> Andrew.

It's about ABI rather than ISA.
If the ABI specifies that 32-bit signed integers parameters that are passed in registers are sign-extened by caller then it is correct.

Re: RISC-V vs. Aarch64

<sqn0f9$p6k$1@gioia.aioe.org>

  copy mid

https://www.novabbs.com/devel/article-flat.php?id=22650&group=comp.arch#22650

  copy link   Newsgroups: comp.arch
Path: i2pn2.org!i2pn.org!aioe.org!rd9pRsUZyxkRLAEK7e/Uzw.user.46.165.242.91.POSTED!not-for-mail
From: terje.ma...@tmsw.no (Terje Mathisen)
Newsgroups: comp.arch
Subject: Re: RISC-V vs. Aarch64
Date: Fri, 31 Dec 2021 14:27:05 +0100
Organization: Aioe.org NNTP Server
Message-ID: <sqn0f9$p6k$1@gioia.aioe.org>
References: <2021Dec24.163843@mips.complang.tuwien.ac.at>
<sq5dj1$1q9$1@dont-email.me>
<59376149-c3d3-489e-8b41-f21bdd0ce5a9n@googlegroups.com>
<sqkcvk$n97$1@dont-email.me> <RrlzJ.130558$SR4.25229@fx43.iad>
<sql2cm$3h7$1@dont-email.me> <sqmsqq$14kp$1@gioia.aioe.org>
<sqmthh$2ea$1@dont-email.me>
Mime-Version: 1.0
Content-Type: text/plain; charset=ISO-8859-1; format=flowed
Content-Transfer-Encoding: 8bit
Injection-Info: gioia.aioe.org; logging-data="25812"; posting-host="rd9pRsUZyxkRLAEK7e/Uzw.user.gioia.aioe.org"; mail-complaints-to="abuse@aioe.org";
User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:68.0) Gecko/20100101
Firefox/68.0 SeaMonkey/2.53.10.1
X-Notice: Filtered by postfilter v. 0.9.2
 by: Terje Mathisen - Fri, 31 Dec 2021 13:27 UTC

Marcus wrote:
> On 2021-12-31, Terje Mathisen wrote:
>> Marcus wrote:
>>> On 2021-12-30, EricP wrote:
>>>> C,C++ and a bunch of languages explicitly define booleans as 0 or 1
>>>> so this definition won't be optimal for those languages.
>>>> VAX Fortran used 0,-1 for LOGICAL but I don't know if that
>>>> was defined by the language or implementation dependant.
>>
>> -1 is better than 1, it can be used as a mask.
>>
>>>
>>> As a software developer I'm painfully aware of this. I decided not to
>>> care too much about it, though. Really, most software that relies on
>>> this property of C should be frowned upon. E.g. expressions like:
>>>
>>>    a = b + (c == d);
>>>
>>> ...aren't really good programming practice.
>>
>> No! Please tell me it ain't so!
>
> :-)
>
>>
>> I use that type of constructs all over the place when writing
>> branchless code/doing table lookups etc.
>
> I think that you'll find that the following code produces the exact same
> result:
>
>     int a;
>     if (c == d) {
>         a = b + 1;
>     } else {
>         a = b;
>     }
>
> It too is completely branchless.

In my use of these constructs, the code has typically been written in
asm, with no helpful peephole optimizer to return it to the form I
intended. :-)

I use another form in branchless conversion of julian day number to
y/m/d, i.e. subtraction and arithmetic shift right to convert the result
into a 0/-1 mask.

>
> My main gripe with the former version is the implicit type conversion
> (boolean to integer), and that I don't like to see logical operands and

bool is a newfangled construct, it all used to be just zero/non-zero ints...

> arithmetic operands mixed in the same expression. Another slightly more
> readable version, IMO, would be:
>
>     a = b + (c == d ? 1 : 0);
>
> See: https://godbolt.org/z/K7ndn57T1

I do like the way trigrams keep all the logic in a single assignment.

Terje

--
- <Terje.Mathisen at tmsw.no>
"almost all programming can be viewed as an exercise in caching"

Re: RISC-V vs. Aarch64

<sqn65l$n9c$1@dont-email.me>

  copy mid

https://www.novabbs.com/devel/article-flat.php?id=22655&group=comp.arch#22655

  copy link   Newsgroups: comp.arch
Path: i2pn2.org!i2pn.org!eternal-september.org!reader02.eternal-september.org!.POSTED!not-for-mail
From: david.br...@hesbynett.no (David Brown)
Newsgroups: comp.arch
Subject: Re: RISC-V vs. Aarch64
Date: Fri, 31 Dec 2021 16:04:21 +0100
Organization: A noiseless patient Spider
Lines: 98
Message-ID: <sqn65l$n9c$1@dont-email.me>
References: <2021Dec24.163843@mips.complang.tuwien.ac.at>
<sq5dj1$1q9$1@dont-email.me>
<59376149-c3d3-489e-8b41-f21bdd0ce5a9n@googlegroups.com>
<sqkcvk$n97$1@dont-email.me> <RrlzJ.130558$SR4.25229@fx43.iad>
<sql2cm$3h7$1@dont-email.me> <sqmsqq$14kp$1@gioia.aioe.org>
<sqmthh$2ea$1@dont-email.me>
Mime-Version: 1.0
Content-Type: text/plain; charset=windows-1252
Content-Transfer-Encoding: 8bit
Injection-Date: Fri, 31 Dec 2021 15:04:21 -0000 (UTC)
Injection-Info: reader02.eternal-september.org; posting-host="b454e564db563d9b651013bbaa3e0164";
logging-data="23852"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX1+yvQLDaJ+MK5JbwGoBnKrPG9Tuju4u8Nc="
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101
Thunderbird/78.11.0
Cancel-Lock: sha1:C1KRFyKO0xU5yqRgAnEOwyvChnw=
In-Reply-To: <sqmthh$2ea$1@dont-email.me>
Content-Language: en-GB
 by: David Brown - Fri, 31 Dec 2021 15:04 UTC

On 31/12/2021 13:37, Marcus wrote:
> On 2021-12-31, Terje Mathisen wrote:
>> Marcus wrote:
>>> On 2021-12-30, EricP wrote:
>>>> C,C++ and a bunch of languages explicitly define booleans as 0 or 1
>>>> so this definition won't be optimal for those languages.
>>>> VAX Fortran used 0,-1 for LOGICAL but I don't know if that
>>>> was defined by the language or implementation dependant.
>>
>> -1 is better than 1, it can be used as a mask.
>>
>>>
>>> As a software developer I'm painfully aware of this. I decided not to
>>> care too much about it, though. Really, most software that relies on
>>> this property of C should be frowned upon. E.g. expressions like:
>>>
>>>    a = b + (c == d);
>>>
>>> ...aren't really good programming practice.
>>
>> No! Please tell me it ain't so!
>
> :-)
>
>>
>> I use that type of constructs all over the place when writing
>> branchless code/doing table lookups etc.
>
> I think that you'll find that the following code produces the exact same
> result:
>
>     int a;
>     if (c == d) {
>         a = b + 1;
>     } else {
>         a = b;
>     }
>
> It too is completely branchless.

Given a good enough compiler, it is branchless. I am a big fan of using
good optimising compilers, so that you can write your source code in the
way you think is clearest and best, and let the compiler worry about the
details of the low-level code optimisations. But it is still useful to
remember that you can't always assume a good compiler.

Also note that on some processors, branched code can be faster than
branchless equivalents.

>
> My main gripe with the former version is the implicit type conversion
> (boolean to integer), and that I don't like to see logical operands and
> arithmetic operands mixed in the same expression.

Some languages have booleans as an integral part of the language and
distinct from arithmetic types. C is not such a language. The
relational operators are defined to give "int" results, and guarantee
that "c == d" will evaluate to 0 or 1. There is no type conversion
here, implicit or otherwise.

C does have a "bool" type (or, more precisely, "_Bool"), but it was
added late (C99) and changing the operators would be a breaking change.

So "a = b + (c == d);" is not, in fact, mixing logical operands and
arithmetic operands in C - it's all arithmetic as far as the language is
concerned.

(You can well argue that the programmer's intention, or the appearance
of the code, is mixing logical and arithmetic operands. And I'd agree -
it's not a style I feel comfortably and clearly expresses the
programmer's intent. It might be appropriate in some circumstances.)

C++ has "bool" built-in, and relational operators (other than the new
spaceship operator) return bool. But for compatibility with C, bool
expressions are implicitly converted to int as needed, and the value is
guaranteed.

(Similarly, the result of "a && b" is an "int" in C, and a "bool" in C++.)

> Another slightly more
> readable version, IMO, would be:
>
>     a = b + (c == d ? 1 : 0);
>
> See: https://godbolt.org/z/K7ndn57T1
>
>>
>> The Dec 24th Advent of Code puzzle had a miniature ALU with no MOV, so
>> it used "x MUL 0" to zero out x, then x ADD N to actually set it to a
>> value. X EQL W returned 1/0, which was subsequently used in
>> multiplications to stand in for branches.
>>
>> Terje
>>
>

Re: RISC-V vs. Aarch64

<e201ffad-8455-4ba8-adf9-ddee1b4dfe3bn@googlegroups.com>

  copy mid

https://www.novabbs.com/devel/article-flat.php?id=22656&group=comp.arch#22656

  copy link   Newsgroups: comp.arch
X-Received: by 2002:a05:620a:22ed:: with SMTP id p13mr23460988qki.768.1640965282661;
Fri, 31 Dec 2021 07:41:22 -0800 (PST)
X-Received: by 2002:a9d:ba8:: with SMTP id 37mr24503663oth.227.1640965282274;
Fri, 31 Dec 2021 07:41:22 -0800 (PST)
Path: i2pn2.org!i2pn.org!weretis.net!feeder6.news.weretis.net!news.misty.com!border2.nntp.dca1.giganews.com!nntp.giganews.com!news-out.google.com!nntp.google.com!postnews.google.com!google-groups.googlegroups.com!not-for-mail
Newsgroups: comp.arch
Date: Fri, 31 Dec 2021 07:41:22 -0800 (PST)
In-Reply-To: <sqn65l$n9c$1@dont-email.me>
Injection-Info: google-groups.googlegroups.com; posting-host=2607:fea8:1de1:fb00:103e:69ab:433f:589c;
posting-account=QId4bgoAAABV4s50talpu-qMcPp519Eb
NNTP-Posting-Host: 2607:fea8:1de1:fb00:103e:69ab:433f:589c
References: <2021Dec24.163843@mips.complang.tuwien.ac.at> <sq5dj1$1q9$1@dont-email.me>
<59376149-c3d3-489e-8b41-f21bdd0ce5a9n@googlegroups.com> <sqkcvk$n97$1@dont-email.me>
<RrlzJ.130558$SR4.25229@fx43.iad> <sql2cm$3h7$1@dont-email.me>
<sqmsqq$14kp$1@gioia.aioe.org> <sqmthh$2ea$1@dont-email.me> <sqn65l$n9c$1@dont-email.me>
User-Agent: G2/1.0
MIME-Version: 1.0
Message-ID: <e201ffad-8455-4ba8-adf9-ddee1b4dfe3bn@googlegroups.com>
Subject: Re: RISC-V vs. Aarch64
From: robfi...@gmail.com (robf...@gmail.com)
Injection-Date: Fri, 31 Dec 2021 15:41:22 +0000
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable
Lines: 15
 by: robf...@gmail.com - Fri, 31 Dec 2021 15:41 UTC

I figured I’d throw Thor cc64 compiler output to the mix:

int foo (register int a, register int b)
{ return a > b;
}

Gives:
_foo:
enter 0
slt a0,a1,a0
leave 0

As can been seen I have not got the compiler removing the ENTER and
LEAVE yet, which could be done when only argument registers are used
in the function.

Re: RISC-V vs. Aarch64

<VSFzJ.136700$7D4.47834@fx37.iad>

  copy mid

https://www.novabbs.com/devel/article-flat.php?id=22657&group=comp.arch#22657

  copy link   Newsgroups: comp.arch
Path: i2pn2.org!i2pn.org!paganini.bofh.team!news.dns-netz.com!news.freedyn.de!newsreader4.netcologne.de!news.netcologne.de!peer01.ams1!peer.ams1.xlned.com!news.xlned.com!peer02.iad!feed-me.highwinds-media.com!news.highwinds-media.com!fx37.iad.POSTED!not-for-mail
From: ThatWoul...@thevillage.com (EricP)
User-Agent: Thunderbird 2.0.0.24 (Windows/20100228)
MIME-Version: 1.0
Newsgroups: comp.arch
Subject: Re: RISC-V vs. Aarch64
References: <2021Dec24.163843@mips.complang.tuwien.ac.at> <sq5dj1$1q9$1@dont-email.me> <59376149-c3d3-489e-8b41-f21bdd0ce5a9n@googlegroups.com> <sqkcvk$n97$1@dont-email.me> <RrlzJ.130558$SR4.25229@fx43.iad> <sql2cm$3h7$1@dont-email.me> <sqmsqq$14kp$1@gioia.aioe.org>
In-Reply-To: <sqmsqq$14kp$1@gioia.aioe.org>
Content-Type: text/plain; charset=ISO-8859-1; format=flowed
Content-Transfer-Encoding: 7bit
Lines: 27
Message-ID: <VSFzJ.136700$7D4.47834@fx37.iad>
X-Complaints-To: abuse@UsenetServer.com
NNTP-Posting-Date: Fri, 31 Dec 2021 16:05:09 UTC
Date: Fri, 31 Dec 2021 11:05:01 -0500
X-Received-Bytes: 2102
 by: EricP - Fri, 31 Dec 2021 16:05 UTC

Terje Mathisen wrote:
> Marcus wrote:
>> On 2021-12-30, EricP wrote:
>>> C,C++ and a bunch of languages explicitly define booleans as 0 or 1
>>> so this definition won't be optimal for those languages.
>>> VAX Fortran used 0,-1 for LOGICAL but I don't know if that
>>> was defined by the language or implementation dependant.
>
> -1 is better than 1, it can be used as a mask.

One or the other usage has to do a negate.
The question is which usage, boolean or mask, is more common?
In general it is boolean so it is mask user that should do the negate.

There is a lot of C code that expects that a = b < c; produces 0 or 1.
So if CMP produces a -1 then a C compiler would always generate a NEG too.

For boolean expressions in IF statements the NEG is unnecessary
if the branch tests zero/non-zero and so it might be optimized away.
But that requires the compiler code gen knowing that boolean expressions
in IF statements are not quite the same as other boolean expressions
(and we give a special dispensation to & and | operators on booleans).
Similar rational optimizes any for CMOV conditionals.

It seems easier to have the mask user pay for the NEG.

Re: RISC-V vs. Aarch64

<a656df24-d422-4d5b-ab1b-8f40b1326d97n@googlegroups.com>

  copy mid

https://www.novabbs.com/devel/article-flat.php?id=22658&group=comp.arch#22658

  copy link   Newsgroups: comp.arch
X-Received: by 2002:a05:620a:199a:: with SMTP id bm26mr25699376qkb.542.1640971053529;
Fri, 31 Dec 2021 09:17:33 -0800 (PST)
X-Received: by 2002:a05:6808:198a:: with SMTP id bj10mr27076338oib.37.1640971053326;
Fri, 31 Dec 2021 09:17:33 -0800 (PST)
Path: i2pn2.org!i2pn.org!weretis.net!feeder6.news.weretis.net!news.misty.com!border2.nntp.dca1.giganews.com!nntp.giganews.com!news-out.google.com!nntp.google.com!postnews.google.com!google-groups.googlegroups.com!not-for-mail
Newsgroups: comp.arch
Date: Fri, 31 Dec 2021 09:17:33 -0800 (PST)
In-Reply-To: <VSFzJ.136700$7D4.47834@fx37.iad>
Injection-Info: google-groups.googlegroups.com; posting-host=2600:1700:291:29f0:44d8:5de8:1a0e:df71;
posting-account=H_G_JQkAAADS6onOMb-dqvUozKse7mcM
NNTP-Posting-Host: 2600:1700:291:29f0:44d8:5de8:1a0e:df71
References: <2021Dec24.163843@mips.complang.tuwien.ac.at> <sq5dj1$1q9$1@dont-email.me>
<59376149-c3d3-489e-8b41-f21bdd0ce5a9n@googlegroups.com> <sqkcvk$n97$1@dont-email.me>
<RrlzJ.130558$SR4.25229@fx43.iad> <sql2cm$3h7$1@dont-email.me>
<sqmsqq$14kp$1@gioia.aioe.org> <VSFzJ.136700$7D4.47834@fx37.iad>
User-Agent: G2/1.0
MIME-Version: 1.0
Message-ID: <a656df24-d422-4d5b-ab1b-8f40b1326d97n@googlegroups.com>
Subject: Re: RISC-V vs. Aarch64
From: MitchAl...@aol.com (MitchAlsup)
Injection-Date: Fri, 31 Dec 2021 17:17:33 +0000
Content-Type: text/plain; charset="UTF-8"
Lines: 40
 by: MitchAlsup - Fri, 31 Dec 2021 17:17 UTC

On Friday, December 31, 2021 at 10:05:12 AM UTC-6, EricP wrote:
> Terje Mathisen wrote:
> > Marcus wrote:
> >> On 2021-12-30, EricP wrote:
> >>> C,C++ and a bunch of languages explicitly define booleans as 0 or 1
> >>> so this definition won't be optimal for those languages.
> >>> VAX Fortran used 0,-1 for LOGICAL but I don't know if that
> >>> was defined by the language or implementation dependant.
> >
> > -1 is better than 1, it can be used as a mask.
> One or the other usage has to do a negate.
<
Which is why it is best for the ISA to have the ability to produce both
0:-1 and 0:+1 and let each language decide for itself which sequence
is best.
<
> The question is which usage, boolean or mask, is more common?
> In general it is boolean so it is mask user that should do the negate.
<
My 66000 even has the instruction to use the mask as a conditional operator
giving an effective bit-by-bit multiplexer ((a&c)|(b&~c)) along with the form
that uses the condition as a selector ((a&!!c)|(a&!c)).
>
> There is a lot of C code that expects that a = b < c; produces 0 or 1.
> So if CMP produces a -1 then a C compiler would always generate a NEG too.
<
s/always/mostly/
<
>
> For boolean expressions in IF statements the NEG is unnecessary
> if the branch tests zero/non-zero and so it might be optimized away.
<
For floating point, one has to give careful consideration to NaNs so that
even after condition inversion that the NaNs go into the else-clause.
<
> But that requires the compiler code gen knowing that boolean expressions
> in IF statements are not quite the same as other boolean expressions
> (and we give a special dispensation to & and | operators on booleans).
> Similar rational optimizes any for CMOV conditionals.
>
> It seems easier to have the mask user pay for the NEG.

Re: RISC-V vs. Aarch64

<sqnej6$1bv7$1@gioia.aioe.org>

  copy mid

https://www.novabbs.com/devel/article-flat.php?id=22659&group=comp.arch#22659

  copy link   Newsgroups: comp.arch
Path: i2pn2.org!i2pn.org!aioe.org!rd9pRsUZyxkRLAEK7e/Uzw.user.46.165.242.91.POSTED!not-for-mail
From: terje.ma...@tmsw.no (Terje Mathisen)
Newsgroups: comp.arch
Subject: Re: RISC-V vs. Aarch64
Date: Fri, 31 Dec 2021 18:28:08 +0100
Organization: Aioe.org NNTP Server
Message-ID: <sqnej6$1bv7$1@gioia.aioe.org>
References: <2021Dec24.163843@mips.complang.tuwien.ac.at>
<sq5dj1$1q9$1@dont-email.me>
<59376149-c3d3-489e-8b41-f21bdd0ce5a9n@googlegroups.com>
<sqkcvk$n97$1@dont-email.me> <RrlzJ.130558$SR4.25229@fx43.iad>
<sql2cm$3h7$1@dont-email.me> <sqmsqq$14kp$1@gioia.aioe.org>
<VSFzJ.136700$7D4.47834@fx37.iad>
Mime-Version: 1.0
Content-Type: text/plain; charset=ISO-8859-1; format=flowed
Content-Transfer-Encoding: 7bit
Injection-Info: gioia.aioe.org; logging-data="45031"; posting-host="rd9pRsUZyxkRLAEK7e/Uzw.user.gioia.aioe.org"; mail-complaints-to="abuse@aioe.org";
User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:68.0) Gecko/20100101
Firefox/68.0 SeaMonkey/2.53.10.1
X-Notice: Filtered by postfilter v. 0.9.2
 by: Terje Mathisen - Fri, 31 Dec 2021 17:28 UTC

EricP wrote:
> Terje Mathisen wrote:
>> Marcus wrote:
>>> On 2021-12-30, EricP wrote:
>>>> C,C++ and a bunch of languages explicitly define booleans as 0 or 1
>>>> so this definition won't be optimal for those languages.
>>>> VAX Fortran used 0,-1 for LOGICAL but I don't know if that
>>>> was defined by the language or implementation dependant.
>>
>> -1 is better than 1, it can be used as a mask.
>
> One or the other usage has to do a negate.
> The question is which usage, boolean or mask, is more common?
> In general it is boolean so it is mask user that should do the negate.
>
> There is a lot of C code that expects that a = b < c; produces 0 or 1.
> So if CMP produces a -1 then a C compiler would always generate a NEG too.
>
> For boolean expressions in IF statements the NEG is unnecessary
> if the branch tests zero/non-zero and so it might be optimized away.
> But that requires the compiler code gen knowing that boolean expressions
> in IF statements are not quite the same as other boolean expressions
> (and we give a special dispensation to & and | operators on booleans).
> Similar rational optimizes any for CMOV conditionals.
>
> It seems easier to have the mask user pay for the NEG.

It is of course _far_ too late to change it in C (or most existing
languages/compilers), but please notice that all the SIMD vector
instruction sets I have seen tend to use 0/-1, specifically because that
is usable as a mask.

x86 also has a movemask* opcode which extracts the top bit from each
element and pack them together into an integer register, this makes it
suitable to verify "Any matching element?" after first doing a SIMD compare.

Terje

--
- <Terje.Mathisen at tmsw.no>
"almost all programming can be viewed as an exercise in caching"

Re: RISC-V vs. Aarch64

<sqnfpi$q82$1@dont-email.me>

  copy mid

https://www.novabbs.com/devel/article-flat.php?id=22661&group=comp.arch#22661

  copy link   Newsgroups: comp.arch
Path: i2pn2.org!i2pn.org!eternal-september.org!reader02.eternal-september.org!.POSTED!not-for-mail
From: cr88...@gmail.com (BGB)
Newsgroups: comp.arch
Subject: Re: RISC-V vs. Aarch64
Date: Fri, 31 Dec 2021 11:48:31 -0600
Organization: A noiseless patient Spider
Lines: 134
Message-ID: <sqnfpi$q82$1@dont-email.me>
References: <2021Dec24.163843@mips.complang.tuwien.ac.at>
<sq5dj1$1q9$1@dont-email.me>
<59376149-c3d3-489e-8b41-f21bdd0ce5a9n@googlegroups.com>
<sqkcvk$n97$1@dont-email.me> <RrlzJ.130558$SR4.25229@fx43.iad>
<sql2cm$3h7$1@dont-email.me> <sqmsqq$14kp$1@gioia.aioe.org>
<sqmthh$2ea$1@dont-email.me> <sqn0f9$p6k$1@gioia.aioe.org>
Mime-Version: 1.0
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: 8bit
Injection-Date: Fri, 31 Dec 2021 17:48:34 -0000 (UTC)
Injection-Info: reader02.eternal-september.org; posting-host="4f77bb898055d3f681c614877a29f57d";
logging-data="26882"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX19OFOc9c/jH/zxQRW/U3R5K"
User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101
Thunderbird/91.4.1
Cancel-Lock: sha1:MTCIUzel+a/iBaibUnQ6XesJ1Vk=
In-Reply-To: <sqn0f9$p6k$1@gioia.aioe.org>
Content-Language: en-US
 by: BGB - Fri, 31 Dec 2021 17:48 UTC

On 12/31/2021 7:27 AM, Terje Mathisen wrote:
> Marcus wrote:
>> On 2021-12-31, Terje Mathisen wrote:
>>> Marcus wrote:
>>>> On 2021-12-30, EricP wrote:
>>>>> C,C++ and a bunch of languages explicitly define booleans as 0 or 1
>>>>> so this definition won't be optimal for those languages.
>>>>> VAX Fortran used 0,-1 for LOGICAL but I don't know if that
>>>>> was defined by the language or implementation dependant.
>>>
>>> -1 is better than 1, it can be used as a mask.
>>>

(!x-1)

>>>>
>>>> As a software developer I'm painfully aware of this. I decided not to
>>>> care too much about it, though. Really, most software that relies on
>>>> this property of C should be frowned upon. E.g. expressions like:
>>>>
>>>>    a = b + (c == d);
>>>>
>>>> ...aren't really good programming practice.
>>>
>>> No! Please tell me it ain't so!
>>
>> :-)
>>
>>>
>>> I use that type of constructs all over the place when writing
>>> branchless code/doing table lookups etc.
>>
>> I think that you'll find that the following code produces the exact same
>> result:
>>
>>      int a;
>>      if (c == d) {
>>          a = b + 1;
>>      } else {
>>          a = b;
>>      }
>>
>> It too is completely branchless.
>
> In my use of these constructs, the code has typically been written in
> asm, with no helpful peephole optimizer to return it to the form I
> intended. :-)
>

The use of an "if()" branch this way, while (likely) branchless in my
case, could be less efficient in many cases due to implementing both
branches via predicated ops rather than by putting the value into a
register.

Say:
a = b + (c == d);

Could be handled as:
CMPEQ R5, R6
MOVT R7
ADD R4, R7, R2

( Using ADC here is possible, but BGBCC will not do so. Something like
"ADC R4, 0, R2" would allow doing it in 2 instructions, but no encoding
exists for this. )

If Branch:
CMPEQ R5, R6
ADD?T R4, 1, R2
MOV?F R4, R2

But, not much difference in this case in terms of clock cycles (it would
be a little worse if a branch were used, but this is part of why I ended
up adding predicated ops in the first place...).

One can't nest them or use complex conditionals, but this isn't usually
a big issue.

Granted, predicated ops are a relative minority (say, only ~ 6% of
constant loads end up predicated, fewer in other categories, ...), but
they can save more cycles than implied by their fairly limited range of
use-cases.

> I use another form in branchless conversion of julian day number to
> y/m/d, i.e. subtraction and arithmetic shift right to convert the result
> into a 0/-1 mask.
>

We need to convince the world to going over to define units of time in
terms of megaseconds and gigaseconds.

Like, one could describe themselves as an ancient vampire who has been
on this Earth for a little over 1 gigasecond...

>>
>> My main gripe with the former version is the implicit type conversion
>> (boolean to integer), and that I don't like to see logical operands and
>
> bool is a newfangled construct, it all used to be just zero/non-zero
> ints...
>

Yeah, _Bool can be defined as:
Integer type whose only defined values are 0 or 1.
Storage size is whatever is both small and convenient.

In BGBCC, the _Bool type basically reduces to an alias for 'unsigned
char', differing in a few contexts, but generally equivalent.

Using 1 bit storage could be more compact, but in many cases trying to
bit-pack these values would be slower than using bytes (and for
bit-packed flags one is probably much better off using
"if(flags&FOO_FLAG)" or similar).

IIRC, there is special case logic in the compiler for casting to _Bool.
So, (_Bool)(expr) => ((expr)!=0)

>> arithmetic operands mixed in the same expression. Another slightly more
>> readable version, IMO, would be:
>>
>>      a = b + (c == d ? 1 : 0);
>>
>> See: https://godbolt.org/z/K7ndn57T1
>
> I do like the way trigrams keep all the logic in a single assignment.
>
> Terje
>

Pages:123456789101112131415
server_pubkey.txt

rocksolid light 0.9.81
clearnet tor