For those who are intererested,

https://loongson.github.io/LoongArch-Documentation/README-EN.html

has the documentation of the new Loongson ISA. At first glance,
it seems to be a fairly conventional RISC ISA remeniscient of MIPS.
Instructions are four bytes only, 32 registers, 32 floating point
registers, branches are with register comparison and 16-bit offset.
No SIMD.

Their primary compiler is gcc, there are Linux systems available
in the gcc compile farm.

On Sunday, January 23, 2022 at 2:47:15 PM UTC-6, John Dallman wrote:
> In article <ssjfhv$5e3$1...@newsreader4.netcologne.de>,
> tko...@netcologne.de (Thomas Koenig) wrote:
>
> > ... the documentation of the new Loongson ISA.
<
I gave it a read:
<
a) it is not a "reduced" instruction set architecture--it has more instructions
that read control registers than My 66000 has instructions (total).
<
b) it IS a 32-bit mono-instruction length ISA in the MIPS tradition--software
does everything wrt TLBs, and cache management.
<
c) its encoding scheme is better than that of RISC-V
<
d) solidly planted in the 1980s mindset of RISC.

On Sunday, January 23, 2022 at 1:47:15 PM UTC-7, John Dallman wrote:
> In article <ssjfhv$5e3$1...@newsreader4.netcologne.de>,
> tko...@netcologne.de (Thomas Koenig) wrote:
>
> > ... the documentation of the new Loongson ISA.
>
> Thanks for this. I've kept an occasional eye on the project for a while,
> on the basis that the Chinese government might decide to mandate its use.

I am very glad to have the opportunity to see this as well.

I'm afraid, though, that the caveat

"Since the academic level of the original authors is extraordinary high,
words and phrases in the original documents are so profound that the
translators with limited knowledge could not express them accurately
even if they tried their best."

amused me. What, nobody in China with a PhD in computing science,
mathematics, or electrical engineering has also bothered to learn
English, if only to read scientific papers in their field?

John Savard

On Sunday, January 23, 2022 at 6:36:08 PM UTC-7, MitchAlsup wrote:

> I gave it a read:
> <
> a) it is not a "reduced" instruction set architecture--it has more instructions
> that read control registers than My 66000 has instructions (total).
> <
> b) it IS a 32-bit mono-instruction length ISA in the MIPS tradition--software
> does everything wrt TLBs, and cache management.
> <
> c) its encoding scheme is better than that of RISC-V
> <
> d) solidly planted in the 1980s mindset of RISC.

After finding that cloning the Alpha and MIPS creates legal issues that
even affect a closed society like China, at least they had the courage to
file off the serial numbers.
Unlike the Soviet Union, which totally scrapped all its computer
development in favor of imitating the IBM System/360. (They should
have cloned the SDS Sigma series of computers instead, which would
have allowed them to more easily match System/360 performance
at a lower technical level.)

John Savard

On 2022-01-24 9:42, Quadibloc wrote:
> On Sunday, January 23, 2022 at 6:36:08 PM UTC-7, MitchAlsup wrote:
>
>> I gave it a read:
>> <
>> a) it is not a "reduced" instruction set architecture--it has more instructions
>> that read control registers than My 66000 has instructions (total).
>> <
>> b) it IS a 32-bit mono-instruction length ISA in the MIPS tradition--software
>> does everything wrt TLBs, and cache management.
>> <
>> c) its encoding scheme is better than that of RISC-V
>> <
>> d) solidly planted in the 1980s mindset of RISC.
>
> After finding that cloning the Alpha and MIPS creates legal issues that
> even affect a closed society like China, at least they had the courage to
> file off the serial numbers.
> Unlike the Soviet Union, which totally scrapped all its computer
> development in favor of imitating the IBM System/360.

Not so totally.

> (They should have cloned the SDS Sigma series of computers instead,
> which would have allowed them to more easily match System/360
> performance at a lower technical level.)

They cloned lots of things -- see
https://en.wikipedia.org/wiki/List_of_Soviet_computer_systems --
including the PDP-11, for example.

But they also had significant independent development, although
sometimes similar to developments elsewhere. For example, the Elbrus
series, https://en.wikipedia.org/wiki/Elbrus_(computer).

Thomas Koenig wrote:
> For those who are intererested,
>
> https://loongson.github.io/LoongArch-Documentation/README-EN.html
>
> has the documentation of the new Loongson ISA. At first glance,
> it seems to be a fairly conventional RISC ISA remeniscient of MIPS.
> Instructions are four bytes only, 32 registers, 32 floating point
> registers, branches are with register comparison and 16-bit offset.
> No SIMD.
>
> Their primary compiler is gcc, there are Linux systems available
> in the gcc compile farm.

Loongson ISA originally supported Mips32 and Mips64.
Last year they started talking about hardware accelerators to
support direct execution of x86 (and x64?) and Arm instructions.
Back then I looked for documentation on it but none was available.

This may be covered by the missing Volume 3 documentation
Virtualization and Binary Translation Extensions at above link.

"... LoongArch is said to feature almost 2,000 of proprietary instructions"

The micro-architecture with extra HW support is supposedly called GS464V.
Searching on 'Loongson "Binary Translation" ' finds very little info.
Searching on 'Loongson GS464V' finds mostly press releases.

Loongson Technology Develops Its Own CPU Instruction Set Architecture
16-April-2021
https://www.tomshardware.com/uk/news/loongson-technology-develops-its-own-cpu-instruction-set-architecture

Loongson announces next-generation 3A5000 CPU, 23-July-2021
https://fuentitech.com/loongson-announces-next-generation-3a5000-cpu/149535/

China's new Loongson CPU is almost as fast as the first Ryzen
And it doesn't rely on any foreign licenses, 24-July-2021
https://www.techspot.com/news/90544-china-new-loongson-cpu-almost-fast-first-ryzen.html