Message-ID:

After Goliath's defeat, giants ceased to command respect. -- Freeman Dyson

devel / comp.arch / Re: RISC-V adding 48-bit instructions

Re: RISC-V adding 48-bit instructions

<tauhf6$3d4qc$2@dont-email.me>

https://www.novabbs.com/devel/article-flat.php?id=26656&group=comp.arch#26656

Path: i2pn2.org!i2pn.org!eternal-september.org!reader01.eternal-september.org!.POSTED!not-for-mail
From: paaroncl...@gmail.com (Paul A. Clayton)
Newsgroups: comp.arch
Subject: Re: RISC-V adding 48-bit instructions
Date: Sat, 16 Jul 2022 10:20:22 -0400
Organization: A noiseless patient Spider
Lines: 20
Message-ID: <tauhf6$3d4qc$2@dont-email.me>
References: <2022Jul12.130009@mips.complang.tuwien.ac.at>
<memo.20220712225127.10156M@jgd.cix.co.uk>
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: 7bit
Injection-Date: Sat, 16 Jul 2022 14:20:22 -0000 (UTC)
Injection-Info: reader01.eternal-september.org; posting-host="babb47d32420e30729473b990cb28fc3";
logging-data="3576652"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX19gla5KGYBYbzU/zXZhJ7gstEWZn5qE2Og="
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101
Thunderbird/78.0
Cancel-Lock: sha1:pC54QhCvruQxTbwfFpeilCu+ejI=
X-Mozilla-News-Host: news://news.eternal-september.org
In-Reply-To: <memo.20220712225127.10156M@jgd.cix.co.uk>

by: Paul A. Clayton - Sat, 16 Jul 2022 14:20 UTC

John Dallman wrote:
[snip]

> As best I can deduce, ARM decided that it was worth addressing the
> embedded market and the general-purpose computing market separately, with
> their Cortex-M and Cortex-A lines. Cortex-A is heading towards being A64
> only, while Cortex-M remains T32.

ARM Cortex also has an R profile targeting real-time uses.

I have not looked closely at what the architectural differences
are, but I suspect they mainly relate to memory protection. (I
vaguely recall reading that an R processor could be included in
a mixed system that used paging in a virtualization layer.) The
R profile did not adopt the 64-bit architecture when it advanced
to Architecture Version 8, but I do not think there is much
preventing the adoption of a minor variant of the AArch64.

(Maybe I should look at how things stand now; the most recent
document I have about R profile is a white paper from 2013.)

Re: RISC-V adding 48-bit instructions

<memo.20220716161439.11788E@jgd.cix.co.uk>

copy mid

https://www.novabbs.com/devel/article-flat.php?id=26658&group=comp.arch#26658

copy link Newsgroups: comp.arch

Path: i2pn2.org!i2pn.org!usenet.goja.nl.eu.org!news.freedyn.de!eternal-september.org!reader01.eternal-september.org!.POSTED!not-for-mail
From: jgd...@cix.co.uk (John Dallman)
Newsgroups: comp.arch
Subject: Re: RISC-V adding 48-bit instructions
Date: Sat, 16 Jul 2022 16:14 +0100 (BST)
Organization: A noiseless patient Spider
Lines: 12
Message-ID: <memo.20220716161439.11788E@jgd.cix.co.uk>
References: <tauhf6$3d4qc$2@dont-email.me>
Reply-To: jgd@cix.co.uk
Injection-Info: reader01.eternal-september.org; posting-host="28be2b97f6afe6909d09957721bd2b85";
logging-data="3586385"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX1/HgHbVP7MqU8MGQ2uYZs/AK/wI2aRslMg="
Cancel-Lock: sha1:BNZx8AosYJHKPK290iiadCAZUEE=

by: John Dallman - Sat, 16 Jul 2022 15:14 UTC

In article <tauhf6$3d4qc$2@dont-email.me>, paaronclayton@gmail.com (Paul
A. Clayton) wrote:

> The [ARM Cortex-]R profile did not adopt the 64-bit architecture
> when it advanced to Architecture Version 8, but I do not think
> there is much preventing the adoption of a minor variant of the
> AArch64.

The first 64-bit ARM Cortex-R processor was announced in September 2020,
in the Cortex-R82.

John

Subject	Author
Re: RISC-V adding 48-bit instructions	Paul A. Clayton
Re: RISC-V adding 48-bit instructions	John Dallman