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computers / comp.sys.apple2 / Can anyone help to make the Mister FPGA Apple II core less half-baked?

SubjectAuthor
* Can anyone help to make the Mister FPGA Apple II core less half-baked?KP
`* Re: Can anyone help to make the Mister FPGA Apple II core lessCharlie
 `* Re: Can anyone help to make the Mister FPGA Apple II core less half-baked?KP
  `* Re: Can anyone help to make the Mister FPGA Apple II core lessCharlie
   `* Re: Can anyone help to make the Mister FPGA Apple II core less half-baked?KP
    `* Re: Can anyone help to make the Mister FPGA Apple II core lessCharlie
     `* Re: Can anyone help to make the Mister FPGA Apple II core less half-baked?KP
      `* Re: Can anyone help to make the Mister FPGA Apple II core lessCharlie
       `* Re: Can anyone help to make the Mister FPGA Apple II core less half-baked?qkumba
        `- Re: Can anyone help to make the Mister FPGA Apple II core lessCharlie

1
Can anyone help to make the Mister FPGA Apple II core less half-baked?

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Subject: Can anyone help to make the Mister FPGA Apple II core less half-baked?
From: kjpm...@gmail.com (KP)
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 by: KP - Tue, 28 Feb 2023 04:26 UTC

The Mister FPGA Apple II core is, in a word... half-baked. Perhaps due to the European origins of many of the lead developers of Mister cores, the Commodore 64 core and ZX Spectrum cores are so fully-featured that, in at least the C64 core, it is possible to connect original Commodore floppy drives to the Mister.

The Apple II core, meanwhile, does not even have a functional Reset key, or the ability to map a functional Reset key. (So it is impossible to use the Apple II core to break into BASIC with a Control-Reset, because there is no Reset key.)

Nor does it have the ability to write to disk images. So using any kind of serious application software is pretty much out of question. And no games that require saving can work.

Let alone the ability to use an IO board to do actual audio IO (which the Spectrum and C64 cores can do), to read and write data to tape or other audio device.

Is anyone here a Mister fan? Does anyone have the technical know-how to help the Apple II core to become even remotely complete? Because, right now, it's pretty half-baked compared to the other cores.

Re: Can anyone help to make the Mister FPGA Apple II core less half-baked?

<ttl7kp$3l155$1@dont-email.me>

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From: charlieD...@verEYEzon.net (Charlie)
Newsgroups: comp.sys.apple2
Subject: Re: Can anyone help to make the Mister FPGA Apple II core less
half-baked?
Date: Tue, 28 Feb 2023 10:46:31 -0500
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 by: Charlie - Tue, 28 Feb 2023 15:46 UTC

On 2/27/2023 11:26 PM, KP wrote:
> The Mister FPGA Apple II core is, in a word... half-baked. Perhaps due to the European origins of many of the lead developers of Mister cores, the Commodore 64 core and ZX Spectrum cores are so fully-featured that, in at least the C64 core, it is possible to connect original Commodore floppy drives to the Mister.
>
> The Apple II core, meanwhile, does not even have a functional Reset key, or the ability to map a functional Reset key. (So it is impossible to use the Apple II core to break into BASIC with a Control-Reset, because there is no Reset key.)
>
> Nor does it have the ability to write to disk images. So using any kind of serious application software is pretty much out of question. And no games that require saving can work.
>
> Let alone the ability to use an IO board to do actual audio IO (which the Spectrum and C64 cores can do), to read and write data to tape or other audio device.
>
> Is anyone here a Mister fan? Does anyone have the technical know-how to help the Apple II core to become even remotely complete? Because, right now, it's pretty half-baked compared to the other cores.

I had never heard of MiSTer so I looked it up.
I found this code:

https://github.com/MiSTer-devel/Apple-II_MiSTer

In the README.md file there are instructions and I found this:

"If you press reset (the right button on the MiST) you'll enter
Applesoft with the ] prompt. From here you have some limited commands.
See: http://www.landsnail.com/a2ref.htm"

Have you tried this?
I took a quick look at the code and reset is an input.

Charlie

Re: Can anyone help to make the Mister FPGA Apple II core less half-baked?

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Subject: Re: Can anyone help to make the Mister FPGA Apple II core less half-baked?
From: kjpm...@gmail.com (KP)
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 by: KP - Tue, 28 Feb 2023 15:58 UTC

Wow, that worked! Thank you!

The next step is more burdensome, though. This thing still won't write to disk images...

On Tuesday, February 28, 2023 at 10:46:35 AM UTC-5, Charlie wrote:
> On 2/27/2023 11:26 PM, KP wrote:
> > The Mister FPGA Apple II core is, in a word... half-baked. Perhaps due to the European origins of many of the lead developers of Mister cores, the Commodore 64 core and ZX Spectrum cores are so fully-featured that, in at least the C64 core, it is possible to connect original Commodore floppy drives to the Mister.
> >
> > The Apple II core, meanwhile, does not even have a functional Reset key, or the ability to map a functional Reset key. (So it is impossible to use the Apple II core to break into BASIC with a Control-Reset, because there is no Reset key.)
> >
> > Nor does it have the ability to write to disk images. So using any kind of serious application software is pretty much out of question. And no games that require saving can work.
> >
> > Let alone the ability to use an IO board to do actual audio IO (which the Spectrum and C64 cores can do), to read and write data to tape or other audio device.
> >
> > Is anyone here a Mister fan? Does anyone have the technical know-how to help the Apple II core to become even remotely complete? Because, right now, it's pretty half-baked compared to the other cores.
> I had never heard of MiSTer so I looked it up.
> I found this code:
>
> https://github.com/MiSTer-devel/Apple-II_MiSTer
>
> In the README.md file there are instructions and I found this:
>
> "If you press reset (the right button on the MiST) you'll enter
> Applesoft with the ] prompt. From here you have some limited commands.
> See: http://www.landsnail.com/a2ref.htm"
>
> Have you tried this?
> I took a quick look at the code and reset is an input.
>
> Charlie

Re: Can anyone help to make the Mister FPGA Apple II core less half-baked?

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From: charlieD...@verEYEzon.net (Charlie)
Newsgroups: comp.sys.apple2
Subject: Re: Can anyone help to make the Mister FPGA Apple II core less
half-baked?
Date: Tue, 28 Feb 2023 13:27:44 -0500
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 by: Charlie - Tue, 28 Feb 2023 18:27 UTC

On 2/28/2023 10:58 AM, KP wrote:
> Wow, that worked! Thank you!
>
> The next step is more burdensome, though. This thing still won't write to disk images...
>
>
> On Tuesday, February 28, 2023 at 10:46:35 AM UTC-5, Charlie wrote:
>> On 2/27/2023 11:26 PM, KP wrote:
>>> The Mister FPGA Apple II core is, in a word... half-baked. Perhaps due to the European origins of many of the lead developers of Mister cores, the Commodore 64 core and ZX Spectrum cores are so fully-featured that, in at least the C64 core, it is possible to connect original Commodore floppy drives to the Mister.
>>>
>>> The Apple II core, meanwhile, does not even have a functional Reset key, or the ability to map a functional Reset key. (So it is impossible to use the Apple II core to break into BASIC with a Control-Reset, because there is no Reset key.)
>>>
>>> Nor does it have the ability to write to disk images. So using any kind of serious application software is pretty much out of question. And no games that require saving can work.
>>>
>>> Let alone the ability to use an IO board to do actual audio IO (which the Spectrum and C64 cores can do), to read and write data to tape or other audio device.
>>>
>>> Is anyone here a Mister fan? Does anyone have the technical know-how to help the Apple II core to become even remotely complete? Because, right now, it's pretty half-baked compared to the other cores.
>> I had never heard of MiSTer so I looked it up.
>> I found this code:
>>
>> https://github.com/MiSTer-devel/Apple-II_MiSTer
>>
>> In the README.md file there are instructions and I found this:
>>
>> "If you press reset (the right button on the MiST) you'll enter
>> Applesoft with the ] prompt. From here you have some limited commands.
>> See: http://www.landsnail.com/a2ref.htm"
>>
>> Have you tried this?
>> I took a quick look at the code and reset is an input.
>>
>> Charlie
Coding for 'writing to disk images' is not trivial (at least not for me).
I struggle with VHDL code (I'm more familiar with verilog) and most of
the existing code is VHDL so I'm not going to be much help.
What FPGA is used in the MiSTer?
What tools are used to synthesize the code?
Also how is the resulting bitstream input to the MiSTer?
Have you tried writing to ProDOS hard drive images (.hdv)?
From what I can see in the HDD.vhd ProDOS HDD support (#7) note,
reading and writing works.
Charlie

Re: Can anyone help to make the Mister FPGA Apple II core less half-baked?

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Subject: Re: Can anyone help to make the Mister FPGA Apple II core less half-baked?
From: kjpm...@gmail.com (KP)
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 by: KP - Wed, 1 Mar 2023 07:20 UTC

I have not tried using HDV images with the Mister Apple II core because so much of what I would want to use disk-writing for would be in DOS 3.3.

You asked "What FPGA is used in the Mister?"

The Mister is built around the DE10-nano, which, in turn, is built around the Intel Cyclone V SE FPGA. From the Terasic (the manufacturer of the DE10-nano) Internet site:

FPGA Device
Intel Cyclone® V SE 5CSEBA6U23I7 device (110K LEs)
Serial configuration device – EPCS64 (revision B2 or later)
USB-Blaster II onboard for programming; JTAG Mode
HDMI TX, compatible with DVI 1.0 and HDCP v1.4
2 push-buttons
4 slide switches
8 green user LEDs
Three 50MHz clock sources from the clock generator
Two 40-pin expansion headers
One Arduino expansion header (Uno R3 compatibility), can be connected with Arduino shields
One 10-pin Analog input expansion header (shared with Arduino Analog input)
A/D converter, 4-pin SPI interface with FPGA
* If the specification of memory device in Quick Start Guide and official website is discordant, refer to DE10-Nano website as the sole stardard.

HPS (Hard Processor System)
800MHz Dual-core ARM Cortex-A9 processor
1GB DDR3 SDRAM (32-bit data bus)
1 Gigabit Ethernet PHY with RJ45 connector
USB OTG Port, USB Micro-AB connector
Micro SD card socket
Accelerometer (I2C interface + interrupt)
UART to USB, USB Mini-B connector
Warm reset button and cold reset button
One user button and one user LED
LTC 2x7 expansion header

On Tuesday, February 28, 2023 at 1:29:52 PM UTC-5, Charlie wrote:
> On 2/28/2023 10:58 AM, KP wrote:
> > Wow, that worked! Thank you!
> >
> > The next step is more burdensome, though. This thing still won't write to disk images...
> >
> >
> > On Tuesday, February 28, 2023 at 10:46:35 AM UTC-5, Charlie wrote:
> >> On 2/27/2023 11:26 PM, KP wrote:
> >>> The Mister FPGA Apple II core is, in a word... half-baked. Perhaps due to the European origins of many of the lead developers of Mister cores, the Commodore 64 core and ZX Spectrum cores are so fully-featured that, in at least the C64 core, it is possible to connect original Commodore floppy drives to the Mister.
> >>>
> >>> The Apple II core, meanwhile, does not even have a functional Reset key, or the ability to map a functional Reset key. (So it is impossible to use the Apple II core to break into BASIC with a Control-Reset, because there is no Reset key.)
> >>>
> >>> Nor does it have the ability to write to disk images. So using any kind of serious application software is pretty much out of question. And no games that require saving can work.
> >>>
> >>> Let alone the ability to use an IO board to do actual audio IO (which the Spectrum and C64 cores can do), to read and write data to tape or other audio device.
> >>>
> >>> Is anyone here a Mister fan? Does anyone have the technical know-how to help the Apple II core to become even remotely complete? Because, right now, it's pretty half-baked compared to the other cores.
> >> I had never heard of MiSTer so I looked it up.
> >> I found this code:
> >>
> >> https://github.com/MiSTer-devel/Apple-II_MiSTer
> >>
> >> In the README.md file there are instructions and I found this:
> >>
> >> "If you press reset (the right button on the MiST) you'll enter
> >> Applesoft with the ] prompt. From here you have some limited commands.
> >> See: http://www.landsnail.com/a2ref.htm"
> >>
> >> Have you tried this?
> >> I took a quick look at the code and reset is an input.
> >>
> >> Charlie
> Coding for 'writing to disk images' is not trivial (at least not for me).
> I struggle with VHDL code (I'm more familiar with verilog) and most of
> the existing code is VHDL so I'm not going to be much help.
>
> What FPGA is used in the MiSTer?
> What tools are used to synthesize the code?
> Also how is the resulting bitstream input to the MiSTer?
>
> Have you tried writing to ProDOS hard drive images (.hdv)?
> From what I can see in the HDD.vhd ProDOS HDD support (#7) note,
> reading and writing works.
>
> Charlie

Re: Can anyone help to make the Mister FPGA Apple II core less half-baked?

<ttof0l$22mf$1@dont-email.me>

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From: charlieD...@verEYEzon.net (Charlie)
Newsgroups: comp.sys.apple2
Subject: Re: Can anyone help to make the Mister FPGA Apple II core less
half-baked?
Date: Wed, 1 Mar 2023 16:10:44 -0500
Organization: A noiseless patient Spider
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 by: Charlie - Wed, 1 Mar 2023 21:10 UTC

On 3/1/2023 2:20 AM, KP wrote:
> I have not tried using HDV images with the Mister Apple II core because so much of what I would want to use disk-writing for would be in DOS 3.3.
Many DOS 3.3 programs have been ported to ProDOS.
qkumba (on this group) has ported a ton of them and he takes requests.
>
> You asked "What FPGA is used in the Mister?"
>
> The Mister is built around the DE10-nano, which, in turn, is built around the Intel Cyclone V SE FPGA. From the Terasic (the manufacturer of the DE10-nano) Internet site:
>
> FPGA Device
> Intel Cyclone® V SE 5CSEBA6U23I7 device (110K LEs)
> Serial configuration device – EPCS64 (revision B2 or later)
> USB-Blaster II onboard for programming; JTAG Mode
> HDMI TX, compatible with DVI 1.0 and HDCP v1.4
> 2 push-buttons
> 4 slide switches
> 8 green user LEDs
> Three 50MHz clock sources from the clock generator
> Two 40-pin expansion headers
> One Arduino expansion header (Uno R3 compatibility), can be connected with Arduino shields
> One 10-pin Analog input expansion header (shared with Arduino Analog input)
> A/D converter, 4-pin SPI interface with FPGA
> * If the specification of memory device in Quick Start Guide and official website is discordant, refer to DE10-Nano website as the sole stardard.
>
> HPS (Hard Processor System)
> 800MHz Dual-core ARM Cortex-A9 processor
> 1GB DDR3 SDRAM (32-bit data bus)
> 1 Gigabit Ethernet PHY with RJ45 connector
> USB OTG Port, USB Micro-AB connector
> Micro SD card socket
> Accelerometer (I2C interface + interrupt)
> UART to USB, USB Mini-B connector
> Warm reset button and cold reset button
> One user button and one user LED
> LTC 2x7 expansion header
>
Nice!
Charlie

Re: Can anyone help to make the Mister FPGA Apple II core less half-baked?

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Subject: Re: Can anyone help to make the Mister FPGA Apple II core less half-baked?
From: kjpm...@gmail.com (KP)
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 by: KP - Thu, 2 Mar 2023 04:31 UTC

Thank you, but using ports of DOS 3.3 programs to ProDOS is not the goal. I want to be able to use DOS 3.3 programs and save to disk..

On Wednesday, March 1, 2023 at 4:12:47 PM UTC-5, Charlie wrote:
> On 3/1/2023 2:20 AM, KP wrote:
> > I have not tried using HDV images with the Mister Apple II core because so much of what I would want to use disk-writing for would be in DOS 3.3.
> Many DOS 3.3 programs have been ported to ProDOS.
> qkumba (on this group) has ported a ton of them and he takes requests.
> >
> > You asked "What FPGA is used in the Mister?"
> >
> > The Mister is built around the DE10-nano, which, in turn, is built around the Intel Cyclone V SE FPGA. From the Terasic (the manufacturer of the DE10-nano) Internet site:
> >
> > FPGA Device
> > Intel Cyclone® V SE 5CSEBA6U23I7 device (110K LEs)
> > Serial configuration device – EPCS64 (revision B2 or later)
> > USB-Blaster II onboard for programming; JTAG Mode
> > HDMI TX, compatible with DVI 1.0 and HDCP v1.4
> > 2 push-buttons
> > 4 slide switches
> > 8 green user LEDs
> > Three 50MHz clock sources from the clock generator
> > Two 40-pin expansion headers
> > One Arduino expansion header (Uno R3 compatibility), can be connected with Arduino shields
> > One 10-pin Analog input expansion header (shared with Arduino Analog input)
> > A/D converter, 4-pin SPI interface with FPGA
> > * If the specification of memory device in Quick Start Guide and official website is discordant, refer to DE10-Nano website as the sole stardard.
> >
> > HPS (Hard Processor System)
> > 800MHz Dual-core ARM Cortex-A9 processor
> > 1GB DDR3 SDRAM (32-bit data bus)
> > 1 Gigabit Ethernet PHY with RJ45 connector
> > USB OTG Port, USB Micro-AB connector
> > Micro SD card socket
> > Accelerometer (I2C interface + interrupt)
> > UART to USB, USB Mini-B connector
> > Warm reset button and cold reset button
> > One user button and one user LED
> > LTC 2x7 expansion header
> >
> Nice!
>
> Charlie

Re: Can anyone help to make the Mister FPGA Apple II core less half-baked?

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From: charlieD...@verEYEzon.net (Charlie)
Newsgroups: comp.sys.apple2
Subject: Re: Can anyone help to make the Mister FPGA Apple II core less
half-baked?
Date: Thu, 2 Mar 2023 12:36:58 -0500
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 by: Charlie - Thu, 2 Mar 2023 17:36 UTC

On 3/1/2023 11:31 PM, KP wrote:
> Thank you, but using ports of DOS 3.3 programs to ProDOS is not the goal. I want to be able to use DOS 3.3 programs and save to disk..
>

Okay, if you mean a real physical disk then yeah, that's going to be tough.

If you mean a disk image, I would think a ProDOS port would include
saving to the disk image (.hdv, .po). Maybe someone on this group can
correct me if I'm wrong.

Charlie

Re: Can anyone help to make the Mister FPGA Apple II core less half-baked?

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Subject: Re: Can anyone help to make the Mister FPGA Apple II core less half-baked?
From: peter.fe...@gmail.com (qkumba)
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 by: qkumba - Thu, 2 Mar 2023 19:45 UTC

For ProDOS ports, if the original program saved to disk then the port will save to a file instead on the hdv, and the program won't know the difference.

Re: Can anyone help to make the Mister FPGA Apple II core less half-baked?

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Subject: Re: Can anyone help to make the Mister FPGA Apple II core less
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 by: Charlie - Thu, 2 Mar 2023 20:01 UTC

On 3/2/2023 2:45 PM, qkumba wrote:
> For ProDOS ports, if the original program saved to disk then the port will save to a file instead on the hdv, and the program won't know the difference.

Thank you for the clarification.

Charlie

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