On 1/23/2022 8:14 PM, Richard Damon wrote:
>
> On 1/23/22 9:03 PM, olcott wrote:
>> On 1/23/2022 7:55 PM, Richard Damon wrote:
>>> On 1/23/22 8:10 PM, olcott wrote:
>>>> On 1/23/2022 7:00 PM, Richard Damon wrote:
>>>>> On 1/23/22 7:25 PM, olcott wrote:
>>>>>> On 1/23/2022 6:09 PM, Richard Damon wrote:
>>>>>>> On 1/23/22 7:00 PM, olcott wrote:
>>>>>>>> On 1/23/2022 5:50 PM, Richard Damon wrote:
>>>>>>>>> On 1/23/22 6:16 PM, olcott wrote:
>>>>>>>>>> On 1/23/2022 5:06 PM, Richard Damon wrote:
>>>>>>>>>>> On 1/23/22 5:47 PM, olcott wrote:
>>>>>>>>>>>> On 1/23/2022 4:40 PM, Richard Damon wrote:
>>>>>>>>>>>>> On 1/23/22 5:18 PM, olcott wrote:
>>>>>>>>>>>>>> On 1/23/2022 4:01 PM, Richard Damon wrote:
>>>>>>>>>>>>>>> On 1/23/22 4:40 PM, olcott wrote:
>>>>>>>>>>>>>>>> On 1/23/2022 2:25 PM, Richard Damon wrote:
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>> On 1/23/22 2:19 PM, olcott wrote:
>>>>>>>>>>>>>>>>>> On 1/22/2022 10:43 PM, Richard Damon wrote:
>>>>>>>>>>>>>>>>>>> On 1/22/22 11:34 PM, olcott wrote:
>>>>>>>>>>>>>>>>>>>> On 1/22/2022 3:36 PM, Richard Damon wrote:
>>>>>>>>>>>>>>>>>>>>> On 1/22/22 4:25 PM, olcott wrote:
>>>>>>>>>>>>>>>>>>>>>> On 1/22/2022 3:20 PM, Richard Damon wrote:
>>>>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>>>> This is true for infinite loops, infinite
>>>>>>>>>>>>>>>>>>>>>> recursion, infinitely nested simulation and all
>>>>>>>>>>>>>>>>>>>>>> other non halting inputs:
>>>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>>>> When-so-ever any simulated input to any simulating
>>>>>>>>>>>>>>>>>>>>>> halt decider would never reach the final state of
>>>>>>>>>>>>>>>>>>>>>> this simulated input in any finite number of steps
>>>>>>>>>>>>>>>>>>>>>> it is always correct for the simulating halt
>>>>>>>>>>>>>>>>>>>>>> decider to abort its simulation and transition to
>>>>>>>>>>>>>>>>>>>>>> its reject state.
>>>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>>> Can you PROVE that statement, or is this just one
>>>>>>>>>>>>>>>>>>>>> of your false 'self evident truth'.
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> Anyone that knows that x86 language can tell that
>>>>>>>>>>>>>>>>>>>> its easy to match the infinite loop pattern:
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> _Infinite_Loop()
>>>>>>>>>>>>>>>>>>>> [000015fa](01)  55              push ebp
>>>>>>>>>>>>>>>>>>>> [000015fb](02)  8bec            mov ebp,esp
>>>>>>>>>>>>>>>>>>>> [000015fd](02)  ebfe            jmp 000015fd
>>>>>>>>>>>>>>>>>>>> [000015ff](01)  5d              pop ebp
>>>>>>>>>>>>>>>>>>>> [00001600](01)  c3              ret
>>>>>>>>>>>>>>>>>>>> Size in bytes:(0007) [00001600]
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> ---[000015fa][002126f0][002126f4] 55 push ebp
>>>>>>>>>>>>>>>>>>>> ---[000015fb][002126f0][002126f4] 8bec
>>>>>>>>>>>>>>>>>>>> mov ebp,esp
>>>>>>>>>>>>>>>>>>>> ---[000015fd][002126f0][002126f4] ebfe
>>>>>>>>>>>>>>>>>>>> jmp 000015fd
>>>>>>>>>>>>>>>>>>>> ---[000015fd][002126f0][002126f4] ebfe
>>>>>>>>>>>>>>>>>>>> jmp 000015fd
>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>> Showing that you can do one case does not prove that
>>>>>>>>>>>>>>>>>>> the same method works on all, particularly harder
>>>>>>>>>>>>>>>>>>> methods.
>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>> That is just you serving Red Herring.
>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>> And that pattern does NOT show up in the simulation
>>>>>>>>>>>>>>>>>>> by H of H^
>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>> Which makes it MORE lies by Red Herring.
>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>> FAIL.
>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>> Total lack of proof.
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>>> Does the proof include the posibility that the
>>>>>>>>>>>>>>>>>>>>> input includes a copy of the decider?
>>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> It is always the case that a simulating halt decider
>>>>>>>>>>>>>>>>>>>> can correctly base its halt status decision on the
>>>>>>>>>>>>>>>>>>>> behavior pure simulation of its input.
>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>> LIE.
>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>> Proven incorrect.
>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>> If H -> H.Qn then H^ -> H^.Qn and Halts and for H^
>>>>>>>>>>>>>>>>>>> <H^> proves H wrong.
>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> We know that this must be true because we know that
>>>>>>>>>>>>>>>>>>>> the pure UTM simulation of an Turing Machine
>>>>>>>>>>>>>>>>>>>> description is defined to have equivalent behavior
>>>>>>>>>>>>>>>>>>>> to that of the direct execution of the same machine
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>> Right, but that does't prove what you sy.
>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>> You are just LYING out of your POOP.
>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>>> The problem is that IF the simulating halt decider
>>>>>>>>>>>>>>>>>>>>> does abort its input based on some condition, then
>>>>>>>>>>>>>>>>>>>>> it is no longer a source of truth for the halting
>>>>>>>>>>>>>>>>>>>>> status of that input.
>>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> It is not answering the question: Does the input
>>>>>>>>>>>>>>>>>>>> stop running?
>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>> YOU need to answer, which H are you using?
>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>> If H doesn't abort, then H^ is non-halting, but H
>>>>>>>>>>>>>>>>>>> will never answer.
>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>> If H does abort and go to H.Qn, then the pure
>>>>>>>>>>>>>>>>>>> simulation of the input WILL halt at H^.Qn, so H was
>>>>>>>>>>>>>>>>>>> wrong.
>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>> FAIL.
>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>> It is answering the question:
>>>>>>>>>>>>>>>>>>>> Would the pure simulation of the input ever stop
>>>>>>>>>>>>>>>>>>>> running?
>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>> Right, and if H -> H.Qn it will.
>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>> FAIL.
>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> YOU JUST AREN'T BRIGHT ENOUGH TO GET THIS. IT CAN BE
>>>>>>>>>>>>>>>>>> VERIFIED AS COMPLETELY TRUE ENTIRELY ON THE BASIS OF
>>>>>>>>>>>>>>>>>> THE MEANING OF ITS WORDS.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> It is the case that if embedded_H recognizes an
>>>>>>>>>>>>>>>>>> infinitely repeating pattern in the simulation of its
>>>>>>>>>>>>>>>>>> input such that this correctly simulated input cannot
>>>>>>>>>>>>>>>>>> possibly reach its final state then this is complete
>>>>>>>>>>>>>>>>>> prove that this simulated input never halts.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> If it COULD CORRECTLY recognize an infinitely
>>>>>>>>>>>>>>>>>> repeating pattern in its
>>>>>>>>>>>>>>>>> simulation that can not possibly reach its final state
>>>>>>>>>>>>>>>>> (when simulated by a UTM, not just H) then, YES, H can
>>>>>>>>>>>>>>>>> go to H.Qn.
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>> The problem is that due to 'pathological
>>>>>>>>>>>>>>>>> self-reference' in H^, ANY pattern that H sees in its
>>>>>>>>>>>>>>>>> simulation of <H^> <H^> that it transitions to H.Qn,
>>>>>>>>>>>>>>>>> will BY DEFINITION, become a halting pattern.
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>> So a correctly simulated INPUT that cannot possibly
>>>>>>>>>>>>>>>> reach its final state reaches its final state anyway.
>>>>>>>>>>>>>>>> YOU ARE DUMBER THAN A BOX OF ROCKS !!!
>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>> That's not what I said, I said there is no pattern that H
>>>>>>>>>>>>>>> use to detect that it won't halt, as any pattern that H
>>>>>>>>>>>>>>> uses to decide to go to H.Qn will be WRONG for H^ as if H
>>>>>>>>>>>>>>> goes to H.Qn, then H^ also goes to H^.Qn and Halts.
>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>
>>>>>>>>>>>>>> When the correctly simulated INPUT to embedded_H cannot
>>>>>>>>>>>>>> possibly reach its final state it is necessarily correct
>>>>>>>>>>>>>> for embedded_H to report that its correctly simulated
>>>>>>>>>>>>>> INPUT cannot possibly reach its final state.
>>>>>>>>>>>>>>
>>>>>>>>>>>>>>
>>>>>>>>>>>>>
>>>>>>>>>>>>> Right,  but you have only proved that H^ is non-halting for
>>>>>>>>>>>>> the case where H doesn't abort its simulation.
>>>>>>>>>>>>>
>>>>>>>>>>>>
>>>>>>>>>>>> Because you are dumber than a box of rocks (or perhaps you
>>>>>>>>>>>> are a bot?)
>>>>>>>>>>>> You did not notice that I never mentioned the word: "halting".
>>>>>>>>>>>>
>>>>>>>>>>>> For a human being you are much dumber than a box of rocks.
>>>>>>>>>>>>
>>>>>>>>>>>> For a bot you did quite well (you nearly passed the Turing
>>>>>>>>>>>> test) it took me this long to realize that you are not a
>>>>>>>>>>>> human being.
>>>>>>>>>>>>
>>>>>>>>>>>
>>>>>>>>>>> But reaching final state is the same as Halting.
>>>>>>>>>>>
>>>>>>>>>>> You have only prove that the pure simulation of the input to
>>>>>>>>>>> H never reaches a final state for case when H doesn't abort
>>>>>>>>>>> its simulation.
>>>>>>>>>>>
>>>>>>>>>> You deliberate weasel words do not apply to what I said:
>>>>>>>>>>
>>>>>>>>>> (1) Premise: When the correctly simulated INPUT to embedded_H
>>>>>>>>>> cannot possibly reach its final state
>>>>>>>>>>
>>>>>>>>>> (2) Conclusion: It is necessarily correct for embedded_H to
>>>>>>>>>> report that its correctly simulated INPUT cannot possibly
>>>>>>>>>> reach its final state.
>>>>>>>>>>
>>>>>>>>>>
>>>>>>>>>
>>>>>>>>> And the correct simulation of the input to H is determined by
>>>>>>>>> the UTM, not H.
>>>>>>>>
>>>>>>>>
>>>>>>>> (2) is a logical consequence of (1).
>>>>>>>> It is logically incorrect to argue with a deductive logical
>>>>>>>> premise.
>>>>>>>>
>>>>>>>
>>>>>>> But 1 is only true if H doesn't go to H.Qn, so H can't correctly
>>>>>>> go to H.Qn.
>>>>>>>
>>>>>>
>>>>>> You are quite the deceiver making sure to always change the
>>>>>> subject rather than directly address the point at hand.
>>>>>
>>>>> And you seem quite dense. I did NOT change the subject, I pointed
>>>>> out an error in your statement. You seem to be unable to comprehend
>>>>> that.
>>>>>
>>>>>>
>>>>>> (2) logically follows from (1) is true.
>>>>>
>>>>> But 1 ISN'T True if H <H^> <H^> -> H.Qn, as the correctly simulate
>>>>> input
>>>>
>>>> When testing whether or not one assertion logically follows from
>>>> another the premises are always "given" to be true even if they are
>>>> false.
>>>
>>> Don't know what sort of logic you are claiming.
>>>
>>> And arguemnt with a false premise is unsound.
>>>
>>
>> We are not yet looking at soundness we are looking at validity.
>> It is true that (2) logically follows from (1).
>> We can't move on from this one point until we have mutual agreement.
>>
>
> Very strange then, why are you arguing about that which was accepted
> unless you disagree to the conditions that they were accepted under?
>
> It has long been accepted that the under the hypothetical condition
> where H can actually determine that the UTM will run forever, it is
> correct (and in fact needed to be correct) for H to go to H.Qn and say
> non-halting.
>

OKAY so then you agree with this?

(1) Premise: When the correctly simulated INPUT to embedded_H
cannot possibly reach its final state

(2) Conclusion: It is necessarily correct for embedded_H to
report that its correctly simulated INPUT cannot possibly
reach its final state.

--
Copyright 2021 Pete Olcott

Talent hits a target no one else can hit;
Genius hits a target no one else can see.
Arthur Schopenhauer