On Friday, September 13, 2019 at 9:08:59 AM UTC-7, jpit...@gmail.com wrote:
> The PLD version was based upon our original Forth Engine done long before we ever ran across Hugh.
>
> In summary,
>
> Hugh is very intelligent, very knowledgeable about Forth,
> but is not really a team player.
>
> Sounds like the Forth community has some problems with non team players.

I recently read an apropos fable:
---------------------------------------------------------
A scorpion asks a frog to carry it across a river on the frog's back. The frog is afraid of being stung
by the scorpion. The scorpion argues that if he stings the frog, they will both die. Because of this,
the frog agrees to carry the scorpion across the river on his back. Midway across the river,
the scorpion stings the frog, dooming both of them.
The dying frog asks the scorpion:
"Why did you sting me? Now both of us will die."
"I am a scorpion. It is in my nature."
---------------------------------------------------------
This fable supposedly comes from Russian (doubtful because scorpions are desert creatures).

The fable is apropos because it describes Tom Hart perfectly.
Tom Hart is incapable of programming in assembly-language, just as a scorpion is incapable
of swimming, so Tom Hart depended upon me to write the assembler and all of the
general-purpose assembly code (except the 16-bit integer addition function that Steve Brault wrote).
When the project was complete and the motion-control board was functioning inside of the
laser-etcher (faster and less expensive than the competitor's MC68000 board), Tom Hart
became very happy --- he believed that Testra had crossed the river --- he celebrated by
letting his true nature come forward, so he stung me with a purely negative job reference
saying that I had achieved "nothing" and that I was "not eligible for rehire."

Considering that there are only three people in the world who know MFX assembly-language
(myself, John Hart and Steve Brault), and that I know more than anybody else, you would think that
he would want to maintain a good relationship with me --- Tom Hart's nature is betrayal, though.
Tom Hart doesn't think about the future --- he has the soul of a scorpion --- he just wants to sting.
This is why Testra continues to be a rinky-dink company without any employees.
Tom Hart has multiple brothers and all of them except John Hart have disowned Tom Hart.
The only person who has remained with Tom Hart is his younger brother John Hart, but now
Tom Hart impersonates John Hart here on comp.lang.forth. This is grossly disrespectful!
John Hart has carried Tom Hart on his back for 60 years, over multiple rivers,
and now Tom Hart stings him with this gross and unforgivable disrespect.
Tom Hart eventually betrays everyone who associates with him.
Currently, Juergen Pintaske is Tom Hart's only friend, but Tom Hart will eventually betray him too...

If Tom Hart could get over himself and show some concern for others,
Testra could have been successful and John Hart's hard work would have earned a profit.

It is worthwhile that Tom Hart should be pilloried as a liar every day for his entire life,
because this will serve as a warning for all of the liars in the world that it is possible
to eventually get caught telling lies and revealed to be a liar for the entire world to see.
If Tom Hart's public shame dissuades a few other liars, this would be the only
positive contribution that Tom Hart could make to the world.

On Thursday, 4 November 2021 at 06:37:13 UTC, Hugh Aguilar wrote:
> On Friday, September 13, 2019 at 9:08:59 AM UTC-7, jpit...@gmail.com wrote:
> > The PLD version was based upon our original Forth Engine done long before we ever ran across Hugh.
> >
> > In summary,
> >
> > Hugh is very intelligent, very knowledgeable about Forth,
> > but is not really a team player.
> >
> > Sounds like the Forth community has some problems with non team players.
>
> I recently read an apropos fable:
> ---------------------------------------------------------
> A scorpion asks a frog to carry it across a river on the frog's back. The frog is afraid of being stung
> by the scorpion. The scorpion argues that if he stings the frog, they will both die. Because of this,
> the frog agrees to carry the scorpion across the river on his back. Midway across the river,
> the scorpion stings the frog, dooming both of them.
> The dying frog asks the scorpion:
> "Why did you sting me? Now both of us will die."
> "I am a scorpion. It is in my nature."
> ---------------------------------------------------------
> This fable supposedly comes from Russian (doubtful because scorpions are desert creatures).
>
> The fable is apropos because it describes Tom Hart perfectly.
> Tom Hart is incapable of programming in assembly-language, just as a scorpion is incapable
> of swimming, so Tom Hart depended upon me to write the assembler and all of the
> general-purpose assembly code (except the 16-bit integer addition function that Steve Brault wrote).
> When the project was complete and the motion-control board was functioning inside of the
> laser-etcher (faster and less expensive than the competitor's MC68000 board), Tom Hart
> became very happy --- he believed that Testra had crossed the river --- he celebrated by
> letting his true nature come forward, so he stung me with a purely negative job reference
> saying that I had achieved "nothing" and that I was "not eligible for rehire."
>
> Considering that there are only three people in the world who know MFX assembly-language
> (myself, John Hart and Steve Brault), and that I know more than anybody else, you would think that
> he would want to maintain a good relationship with me --- Tom Hart's nature is betrayal, though.
> Tom Hart doesn't think about the future --- he has the soul of a scorpion --- he just wants to sting.
> This is why Testra continues to be a rinky-dink company without any employees.
> Tom Hart has multiple brothers and all of them except John Hart have disowned Tom Hart.
> The only person who has remained with Tom Hart is his younger brother John Hart, but now
> Tom Hart impersonates John Hart here on comp.lang.forth. This is grossly disrespectful!
> John Hart has carried Tom Hart on his back for 60 years, over multiple rivers,
> and now Tom Hart stings him with this gross and unforgivable disrespect.
> Tom Hart eventually betrays everyone who associates with him.
> Currently, Juergen Pintaske is Tom Hart's only friend, but Tom Hart will eventually betray him too...
>
> If Tom Hart could get over himself and show some concern for others,
> Testra could have been successful and John Hart's hard work would have earned a profit.
>
> It is worthwhile that Tom Hart should be pilloried as a liar every day for his entire life,
> because this will serve as a warning for all of the liars in the world that it is possible
> to eventually get caught telling lies and revealed to be a liar for the entire world to see.
> If Tom Hart's public shame dissuades a few other liars, this would be the only
> positive contribution that Tom Hart could make to the world.

WOW -
HUGH Aguilar is now more knowledgeable than Wikipedia!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
https://en.wikipedia.org/wiki/The_Scorpion_and_the_Frog

He will most probably re-write the bible soon
But does it matter to anybody?

It seems he did MFX or part of it one generation ago
and has not taken it any further in any other project.
Well, it seems he at least takes the NDA signed seriously ...

The use of Forth to generate VHDL is on the Testra website
but it seems not relevant to him or understood in its power ...

On Thursday, November 4, 2021 at 11:13:48 AM UTC-7, jpit...@gmail.com wrote:
> It seems he did MFX or part of it one generation ago
> and has not taken it any further in any other project.
> Well, it seems he at least takes the NDA signed seriously ...

I have said many times that I designed and wrote MFX --- not just part of it.
Juergen Pintaske is an annoying little prick who endlessly accuses me of lying.

Tom Hart is also an annoying little prick who accuses me of lying, by saying
that the MiniForth design was completed long before I showed up and that
I had nothing to do with it --- the truth is that I designed and wrote MFX, which is
the assembler, simulator and Forth cross-compiler for the MiniForth, and this was done
during the development of the MiniForth.

Juergen Pintaske is also lying by saying that I signed an NDA at Testra. I did not!
Maintenance programmers are required to sign an NDA because they are being given
access to a lot of source-code written by real programmers that they would like to steal.
As far back as the 1980s, I was aware that NDAs are commonly known as:
"slave contracts." No real programmer will ever sign an NDA. This is because any software
that he writes in the future, after leaving the company, will automatically become
the intellectual property (IP) of that company --- this is even if the software is unrelated
to anything that the programmer was involved in at the company --- the NDA is effectively
a life-long slavery contract allowing the company to claim ownership of all IP that
the programmer ever invents, up until the programmer's miserable life ends.
I was well aware of this, which is why I would have refused to sign an NDA at Testra,
and they were aware that I was aware, so they didn't ask me to sign an NDA.
I invented the algorithm used in MFX to out-of-order the instructions, so the idea
that I would be legally banned from using this algorithm outside of Testra
is absurd --- the algorithm originated in my head and it will always be my big idea.

Tom Hart is lying when he says (impersonating his brother John Hart):

On Friday, July 23, 2021 at 1:43:39 AM UTC-7, johnro...@gmail.com wrote:
> Hugh appears to be stuck in a time loop, like Phill Connors in Ground Hogs Day. I've been ignoring his emails
> because it didn't seem like responding would help and his reply confirms it. When he stopped by a few years ago,
> it was my impression he was working on a 4th processor similar to ours. I didn't mention that most companies
> would object to an ex employee using their IP. I actually hoped he could do something with it and brought up
> our FPGA development tool because feedback would help us refine it and might help him with his project.
> His brother worked for us after he left on the HPGL converter, not Hugh. When he complained about it,
> I explained that Tom was confused about that, and thought that would be the end of it.
>
> Now, almost a lifetime after he worked for us, inconsequential errors have multiplied into a
> litany of grievances from healthcare to pay, wasting space on a board dedicated to improving the Forth
> language, something Hugh and everyone else here believes in, I would hope. What a waste!

The liar Tom Hart says that my TOYF design is Testra's IP (intellectual property). It is not.

Tom Hart references the movie: "Ground Hog Day" He is a slimy salesman who watches
a lot of Hollywood movies and considers himself to be wise. Programmers don't talk like this.
It would also be just a little bit too ironic, because John Hart continues to use my MFX that
I wrote in 1994 everyday, and he continues to use UR/Forth (now upgraded to run under
Windows 10) everyday --- so he, more than me, is stuck in a time loop in which he remains
in 1994 all the way up through 2021 --- I gave up on UR/Forth after LMI went out of business.

Tom Hart is also lying when he attacks my brother.
The truth is that I wrote a program to convert AutoCAD .dxf files into CNC gcode files.
There was no HPGL program. My brother was not involved in any of this.

Also, the liar Tom Hart is saying that I'm so incompetent that I can't write a simple data-format
conversion program. That is not true. I had the data-format conversion working without difficulty.
The problem was that I had never heard of Bezier Splines, and nobody told me about Bezier Splines,
so I didn't know how to smooth out the lines. I did do a lot of smoothing out, using rules that I made up
on my own, but it was not really at the quality level that Bezier Splines would supposedly provide
(I have never actually seen any program that used Bezier Splines, so I don't know what quality level
is provided). I also don't know if I could have figured out how to implement Bezier Splines.
The math might be over my head --- I'm not really a mathematician --- also, I'm not going to spend
my own time figuring out complicated math; I'm not into working for free, especially on hard projects.
I think those drawings were scanned-in charcoal drawings, which is why the lines were
a mish-mash of short lines and squiggles --- the picture was recognizable from a distance
but the data looked like garbage up close --- none of us are mind-readers, so we can't know what
the artist originally intended, so there is no way to determine the quality of my rendition.

We now have about 180 posts and nearly 3500 view regarding our most successful Forth Killer Hugh Aguilar.
I am quite surprised how interested people seem to be here.
The older folke here will all know it, but I assume for many the context is unclear

It might be time to remember what it is all about:

First My letter to Testra: Copied from the beginning.

++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Dear Tom,

We have not spoken for a while.
This email is not really regarding business now, but trying to put the history right.
Regarding Testra and regarding Hugh Aguilar.

Hugh Aguilar basically says for years here on clf. that he has basically invented the MFX processor of Testra,
And the software that basically runs the company TESTRA.

I do not mind if this were true, but I really doubt it,
as now – over probably 10 or 20 years -
Not much has been published/ posted by him as far as I have seen;

– rather than these insults and telling other people are liars and worse
– actually everybody who has a different opinion.

According to his info he gave here,
he now drives taxis or tractors for a living.
No reference to any programming.

See his last post from Comp Lang Forth; this triggered this email to Testra:

On Wednesday, June 12, 2019 at 10:11:21 AM UTC-7, Anton Ertl wrote:
> EuroForth 2019 will be held in Hamburg, Germany on September 13-15.
>
> The deadline for the academic stream (refereed) papers is June 30. So
> now is the time to write up your research to have it ready by the
> deadline. For industrial (non-refereed) papers the deadline is August
> 31.
I have been reading some "inspiring Mark Twain quotes on life"
http://www.quoteambition.com/inspiring-mark-twain-quotes-life/

This quote should be very inspiring for the EuroForth writers:
“Never tell the truth to people who are not worthy of it.”

Anton Ertl is the referee for the "academic" papers.
He and Bernd Paysan wrote a refereed paper for EuroForth-2018
that had no purpose except to attack the rquotations.
They lied when they said:
"the higher-order word that calls the rquotation must not use locals."

AFAIK, Anton Ertl and Bernd Paysan are lying about the rquotations
as a service to Stephen Pelc who will later "invent" rquotations
or something similar as a proprietary VFX feature
Anton Ertl and Bernd Paysan don't believe that the Forthers
are worthy of being given rquotations for free, but instead believe
that Forthers must pay Stephen Pelc for this feature.

> The call for papers including submission instructions can be found on
> <http://www.euroforth.org/ef19/cfp.html>.
The actual "submission instructions" EuroForth aspirants need,
are obtained by getting on your knees and asking Stephen Pelc.
You may be told to attack my code by lying about it.
You may be told to not invent useful Forth features that
Stephen Pelc plans on inventing later as proprietary VFX features.
You may be told to not write any working Forth code, but instead
to submit vague dreams about what it would be like to write
working Forth code (as Peter Knaggs and Andrew Haley did).

Ultimately, everybody who goes to EuroForth will dishonor themselves
with blatant lying and purposeful ignorance.

Such and worse posts come on a daily / weekly basis as you can verify yourself.
I have been a target myself as well.

Is it possible for you to tell
For how long he was an employee of Testra if he was
Or if he was just a contractor/consultant
How long this working relationship lasted
Why your relationship ceased,
and what he really achieved at TESTRA??

Some partial answers would be very helpful already.

Just to make it clear:
I have no business relationship with MPE anymore so this is a purely private activity.

But as it makes me sick how he behaves on clf,

It was worth at least trying to find out and write this email,

to find out
if what he states about your relationship is true and his software runs or did run TESTRA
or if this can be put right.

This email sent to you has been published as is on clf as well.

Please mark in your answer to me,
which part of your answer I can quote.

Thank you very much in advance.

Kind regards
Juergen

++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

I was very surprised about how detailed the answer from Testra was. This was acually unexpected.
It seems to show, how angry Testra is about the way Hugh Aguilar describes this company.
For many years now. How would you ract?
And we can only guess about what Hugh Aguilar comments about his time there.

We all can only comment about what has come from the President of Testra.
And some more that has been posted from them.

Copied from higher up:

++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Hi Juergen,

Nice to hear from you. I was going to answer your prior Email, but got busy.

Some answers regarding your questions:

Is it possible for you to tell
For how long he was an employee of Testra if he was

I did not go back and look at the payroll records,
but to my recollection it was on the order of a year or so.

Or if he was just a contractor/consultant

Maybe at the beginning.

How long this working relationship lasted

As I stated, maybe a year or so.

Why your relationship ceased,

He was difficult to work with.
He did fine if it was something he could do by himself without supervision,
but if it was a team effort, forget it.

I let him go myself,
after I had given him a project to write a DXF converter to HPGL code.
He would not take any direction.
I scrapped the project.

and what he really achieved at TESTRA??

He wrote our Forth compiler for the processor
that we implemented in a Lattice PLD.

He did a good job on it,
we are still using it with a few bug fixes and minor modifications.

He had nothing to do with the processor itself,
that was all designed by John Hart and Steve Brault.

The PLD version was based upon our original Forth Engine done long before we ever ran across Hugh.

In summary,

Hugh is very intelligent, very knowledgeable about Forth,
but is not really a team player.

Sounds like the Forth community has some problems with non team players.

You can quote me, but it has to be all or none of the above!

Thomas W. Hart, Jr.
President
Testra Corporation
1201 N Stadem Drive
Tempe AZ 85281
tom...@testra.com
www.testra.com
(480)560-6141 cell
(480)966-8428 office
(480)966-7215 fax

++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

On Monday, 8 November 2021 at 08:19:48 UTC, Jurgen Pitaske wrote:
> I was very surprised about how detailed the answer from Testra was. This was acually unexpected.
> It seems to show, how angry Testra is about the way Hugh Aguilar describes this company.
> For many years now. How would you ract?
> And we can only guess about what Hugh Aguilar comments about his time there.
>
> We all can only comment about what has come from the President of Testra.
> And some more that has been posted from them.
>
> Copied from higher up:
>
> ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
>
> Hi Juergen,
>
> Nice to hear from you. I was going to answer your prior Email, but got busy.
>
> Some answers regarding your questions:
> Is it possible for you to tell
> For how long he was an employee of Testra if he was
> I did not go back and look at the payroll records,
> but to my recollection it was on the order of a year or so.
> Or if he was just a contractor/consultant
> Maybe at the beginning.
> How long this working relationship lasted
> As I stated, maybe a year or so.
>
> Why your relationship ceased,
>
> He was difficult to work with.
> He did fine if it was something he could do by himself without supervision,
> but if it was a team effort, forget it.
>
> I let him go myself,
> after I had given him a project to write a DXF converter to HPGL code.
> He would not take any direction.
> I scrapped the project.
> and what he really achieved at TESTRA??
> He wrote our Forth compiler for the processor
> that we implemented in a Lattice PLD.
>
> He did a good job on it,
> we are still using it with a few bug fixes and minor modifications.
>
> He had nothing to do with the processor itself,
> that was all designed by John Hart and Steve Brault.
> The PLD version was based upon our original Forth Engine done long before we ever ran across Hugh.
>
> In summary,
>
> Hugh is very intelligent, very knowledgeable about Forth,
> but is not really a team player.
>
> Sounds like the Forth community has some problems with non team players.
> You can quote me, but it has to be all or none of the above!
>
>
> Thomas W. Hart, Jr.
> President
> Testra Corporation
> 1201 N Stadem Drive
> Tempe AZ 85281
> tom...@testra.com
> www.testra.com
> (480)560-6141 cell
> (480)966-8428 office
> (480)966-7215 fax
>
> ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

And for people who prefer to read it offline, and more in context
I did a PDF when we reached about 2800 reads.
You can download it here
https://www.dropbox.com/sh/ah8umk0hgq1818s/AAC8nNEueZZcIYJ8uGP4F4wPa?dl=0
Some recent posts are missing, but I might do an update when we reach the
4th ousend reads ...

On Monday, November 8, 2021 at 2:08:26 AM UTC-7, jpit...@gmail.com wrote:
> On Monday, 8 November 2021 at 08:19:48 UTC, Jurgen Pitaske wrote:

Jurgen,
When the op code definition file for our new 32bit Forth FPGA processors is complete I'll post it.
Explaining how it controls the MFX compiler will give Hugh something to do ;
and give this thread a chance to end on a positive note.

jrh

On Tuesday, 9 November 2021 at 06:11:29 UTC, johnro...@gmail.com wrote:
> On Monday, November 8, 2021 at 2:08:26 AM UTC-7, jpit...@gmail.com wrote:
> > On Monday, 8 November 2021 at 08:19:48 UTC, Jurgen Pitaske wrote:
> Jurgen,
> When the op code definition file for our new 32bit Forth FPGA processors is complete I'll post it.
> Explaining how it controls the MFX compiler will give Hugh something to do ;
> and give this thread a chance to end on a positive note.
>
> jrh

THIS WOULD BE BRILLIANT.
Looking forward to this and what might come out of it.

+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

As I had a bit of time
and there was actually a positive post,
I gave the PDF an update up to the contents of today,
so people can read it all in context.

https://www.dropbox.com/sh/ah8umk0hgq1818s/AAC8nNEueZZcIYJ8uGP4F4wPa?dl=0

> When the op code definition file for our new 32bit Forth FPGA processors is complete I'll post it.
> Explaining how it controls the MFX compiler will give Hugh something to do ;
> and give this thread a chance to end on a positive note.

How many Forth CPUs do you plan to design? How many do you need?

:)

On Monday, November 8, 2021 at 2:08:26 AM UTC-7, jpit...@gmail.com wrote:
> And for people who prefer to read it offline, and more in context
> I did a PDF when we reached about 2800 reads.
> You can download it here
> https://www.dropbox.com/sh/ah8umk0hgq1818s/AAC8nNEueZZcIYJ8uGP4F4wPa?dl=0
> Some recent posts are missing, but I might do an update when we reach the
> 4th ousend reads ...

Juergen Pintaske has a long history of changing people's words to make them
seem to say something that they didn't say.
The only reason why he would distribute a PDF representation of this thread,
is so he can edit it to change people's words and/or delete incriminating evidence
against himself.

For example, here is a post from this thread in which I show that Juergen Pintaske
was knowingly lying to Tom Hart. Juergen Pintaske would like to delete this from the record.

On Sunday, October 20, 2019 at 4:38:48 PM UTC-7, hughag...@gmail.com wrote:
> On Friday, September 13, 2019 at 9:08:59 AM UTC-7, Jurgen Pitaske wrote:
> > Dear Tom,
> >
> > We have not spoken for a while.
> > This email is not really regarding business now, but trying to put the history right.
> > Regarding Testra and regarding Hugh Aguilar.
> >
> > Hugh Aguilar basically says for years here on clf. that he has basically invented the MFX processor of Testra,
> > And the software that basically runs the company TESTRA.
> This is not true.
> I already said that this is not true about two weeks prior to
> Juergen Pintaske making the same accusation to Tom Hart against me again:
> https://groups.google.com/forum/#!topic/comp.lang.forth/9IHvRJmMn20
>
> On Saturday, August 31, 2019 at 1:20:19 PM UTC-7, hughag...@gmail.com wrote:
> > On Saturday, August 31, 2019 at 7:31:06 AM UTC-7, Jurgen Pitaske wrote:
> > > On Saturday, 31 August 2019 03:04:11 UTC+1, hughag...@gmail.com wrote:
> > > > I have been reading some "inspiring Mark Twain quotes on life"
> > > > http://www.quoteambition.com/inspiring-mark-twain-quotes-life/
> > > >
> > > > This quote should be very inspiring for the EuroForth writers:
> > > > “Never tell the truth to people who are not worthy of it.”
> > >
> > > Hugh Aguilar basically says for years here on clf.
> > > that he has basically invented the MFX processor of Testra,
> > > And the software that basically runs the company TESTRA.
> > >
> > > I do not mind if this were true, but I really doubt it,
> >
> > Jurgen Pintaske (or Pitaske, or whatever) has his facts wrong.
> > MFX is not a processor. MFX is a cross-compiler that I wrote.
> > MFX generates code for the MiniForth processor --- it doesn't
> > "run the company" (whatever that might mean).
>
> As a general rule of thumb, whenever a person predicates his
> statements with the word "basically," that person is lying.
> He is making general statements that represents what he considers
> to be the "greater truth," but which are not the actual truth.

On Tuesday, November 9, 2021 at 1:55:46 PM UTC-7, Ilya Tarasov wrote:
> > When the op code definition file for our new 32bit Forth FPGA processors is complete I'll post it.
> > Explaining how it controls the MFX compiler will give Hugh something to do ;
> > and give this thread a chance to end on a positive note.
> How many Forth CPUs do you plan to design? How many do you need?
>
> :)

Ilya is failing to realize that this is not John Hart --- this is Tom Hart impersonating
his brother John Hart --- the gmail address is a big clue.
John Hart uses the email address jhart@testra.com
This is the email address that he used when he sent me that email about the
"Law of Love" and how he continues to be anti-abortion --- that is John Hart.

This post that Ilya is responding to is just arrogant sales-clown nonsense.
The term is ISA (instruction set architecture) not: "op code definition file."
He says: "Explaining how it controls the MFX compiler will give Hugh something to do"
What does that mean??? How does the ISA control the MFX compiler??? What???
This is meaningless jibber-jabber from a sales clown lacking technical knowledge.

This is Tom Hart continuing to tell the lie that MFX is the interactive Forth compiler.
The truth is that MFX is the assembler, simulator and Forth cross-compiler that I wrote.
The interactive Forth compiler was written in MFX after I left.

He says that he wants to: "give this thread a chance to end on a positive note"
This is Tom Hart who is so arrogant that he thinks that I will forgive him for lying.
The only way for this thread to end on a positive note would be for Tom Hart
to commit suicide --- I intend to call him a liar every day for the rest of this life ---
may he burn in Hell!

Ilya asks: "How many Forth CPUs do you plan to design? How many do you need?"
Ilya is trying to point out that he has automated the process of producing a Forth
processor. For example, the cell size (16-bit or 32-bit) is a parameter. Ilya can build
multi-core Forth processors, and the number of cores is a parameter.
Ilya seems to be not aware that the MiniForth/RACE is very different. It is a VLIW
processor and it has an assembly-language (I wrote the assembler). Ilya's Forth
processors have small set of primitives that are implemented in Verilog, but
they do not have an assembly-language so there is no way for the user to
implement new primitives except by upgrading the Verilog. By comparison,
the MiniForth/RACE has an assembly-language so implementing new primitives
is easy and does not require making a new FPGA --- the "isp" in "isp1048"
means: "in-socket-programmable" --- so, to add new primitives you do need
to reprogram the code-memory with an external piggy-back thingy, but you don't
need to modify the HDL code or rebuild the PLD itself.

Ilya's technique with multi-core loosely-coupled Forth processors is appropriate
for FPGAs because they have a lot of resources but they lack connectivity.
The MiniForth was built on the Lattice isp1048 PLD in 1994 that had very little
resources but a lot of connectivity --- VLIW was appropriate then.
Most likely, this is the point that Ilya is trying to make --- VLIW is obsolete now.

On Tuesday, November 9, 2021 at 1:55:46 PM UTC-7, Ilya Tarasov wrote:

> How many Forth CPUs do you plan to design? How many do you need?

This will be the last one. The goal is to make it so when the firmware is extended for hardware interfaces or
computation intensive processe, the compiler will be entended. For example, if the job requires a faster multiply,
all that needs to be done is add vendor IP to the list, generate a new.v file, and build a new jed. Opcodes for new
function are added, those that changed are updated, and any that were deleted will cause errors if used.

Our present 16bit system has a USB interface, a local network, a port for wireless, a serial port for
miscellaneous I/O, two pwm outputs, four encoder inputs, and outputs to control four axis of motion.
The 32bit processor will enable us to increase the number of axis to 16, make the program space
60 times bigger, and execute code ten times faster, without changing the hardware.

On Wednesday, November 10, 2021 at 9:32:00 AM UTC+3, johnro...@gmail.com wrote:
> On Tuesday, November 9, 2021 at 1:55:46 PM UTC-7, Ilya Tarasov wrote:
> > How many Forth CPUs do you plan to design? How many do you need?
> This will be the last one. The goal is to make it so when the firmware is extended for hardware interfaces or
> computation intensive processe, the compiler will be entended. For example, if the job requires a faster multiply,
> all that needs to be done is add vendor IP to the list, generate a new.v file, and build a new jed. Opcodes for new
> function are added, those that changed are updated, and any that were deleted will cause errors if used.
>

Like Xtensa?

Do you have any public documents about your chip?

On Mon, 8 Nov 2021 22:11:28 -0800 (PST)
John Hart <johnrogerhart@gmail.com> wrote:

> When the op code definition file for our new 32bit Forth FPGA processors is complete I'll post it.

That would be interesting, thanks.

I once planned, and bought parts for a CPLD based stack engine, but did not complete it. Might you be willing to publish the op-code definitions for your first processor? I'd like to see how close I was.

Jan Coombs
--

On Wednesday, 10 November 2021 at 09:10:21 UTC, Jan Coombs wrote:
> On Mon, 8 Nov 2021 22:11:28 -0800 (PST)
> John Hart <johnro...@gmail.com> wrote:
>
> > When the op code definition file for our new 32bit Forth FPGA processors is complete I'll post it.
> That would be interesting, thanks.
>
> I once planned, and bought parts for a CPLD based stack engine, but did not complete it. Might you be willing to publish the op-code definitions for your first processor? I'd like to see how close I was.
>
> Jan Coombs
> --

This just reminded me of the other interesting project at Testra:

Forth and VHDL:

I wonder if the offer on the Testra website is still valid:
http://testra.com/Forth/VHDL.htm

Proposal
1. A FIG membership offer that would contain the Forth VHDL along with a demo Forth processor that could be used in the customers product for a small royalty.
2. Part of the membership fee would go to pay for customer support during the trial period.
3. The goal is to have this processor run at two to five MIPS and fit in a low cost PLD. ($3-15$) along with, room for some additional logic.
Notes:
1. Some of the competing VHDL systems allow "C" to be used in the design process.
2. Universal VHDL systems are expensive.
3. Many PLD manufactures provide simple low cost systems for their parts.
4. By using a standard format for the output files, other tools, such as schematic capture could be used.
5. A Forth VHDL system including, a demo Forth processor implemented in a standard PLD, could be distributed. As this system would be written in Forth the customer would have to learn Forth.
The logic for the processor is arrived at by building a table that maps the output for all possible input combinations of each section, and then transforming those tables a into a set of gates.
The first step of this process is to factor the design into parts that are small enough to be mapped into a reasonable amount of memory. Each part is described using a simple program that fills the table with the bit map describing it's behavior.
6. Forth as a simulator to test the viability of the instruction set. The hardware simulator has four main parts:
the inner interpreter to fetch the instructions,
the field extractor to get the operands,
the case statements to branch to the execution modules and,
the data space translators.
7. Forth is used as a compiler for the new processor.

среда, 10 ноября 2021 г. в 09:32:00 UTC+3, johnro...@gmail.com:
> On Tuesday, November 9, 2021 at 1:55:46 PM UTC-7, Ilya Tarasov wrote:
> > How many Forth CPUs do you plan to design? How many do you need?
> This will be the last one. The goal is to make it so when the firmware is extended for hardware interfaces or
> computation intensive processe, the compiler will be entended. For example, if the job requires a faster multiply,
> all that needs to be done is add vendor IP to the list, generate a new.v file, and build a new jed. Opcodes for new
> function are added, those that changed are updated, and any that were deleted will cause errors if used.
>
> Our present 16bit system has a USB interface, a local network, a port for wireless, a serial port for
> miscellaneous I/O, two pwm outputs, four encoder inputs, and outputs to control four axis of motion.
>
> The 32bit processor will enable us to increase the number of axis to 16, make the program space
> 60 times bigger, and execute code ten times faster, without changing the hardware.

Well, as usual, a number of methodological disadvantages. Good luck with this dream.

On 10/11/2021 11:16, Hugh Aguilar wrote:
>
> I intend to call him a liar every day for the rest of this life ---
> may he burn in Hell!

"The infliction of cruelty with a good conscience is a delight to
moralists. That is why they invented Hell." - Bertrand Russell

On Wednesday, November 10, 2021 at 7:21:58 AM UTC-7, Ilya Tarasov wrote:
> среда, 10 ноября 2021 г. в 09:32:00 UTC+3, johnro...@gmail.com:
> > On Tuesday, November 9, 2021 at 1:55:46 PM UTC-7, Ilya Tarasov wrote:
> > > How many Forth CPUs do you plan to design? How many do you need?
> > This will be the last one. The goal is to make it so when the firmware is extended for hardware interfaces or
> > computation intensive processe, the compiler will be entended. For example, if the job requires a faster multiply,
> > all that needs to be done is add vendor IP to the list, generate a new.v file, and build a new jed. Opcodes for new
> > function are added, those that changed are updated, and any that were deleted will cause errors if used.
> >
> > Our present 16bit system has a USB interface, a local network, a port for wireless, a serial port for
> > miscellaneous I/O, two pwm outputs, four encoder inputs, and outputs to control four axis of motion.
> >
> > The 32bit processor will enable us to increase the number of axis to 16, make the program space
> > 60 times bigger, and execute code ten times faster, without changing the hardware.
> Well, as usual, a number of methodological disadvantages. Good luck with this dream.

Ilya --- this is not John Hart the designer, this is Tom Hart the salesman delivering a blizzard
of buzz-words.

He says above that describing how MFX works, especially the DUJOUR.4TH file, will give me
something to do. He wants me to document it for free --- he doesn't know how it works,
which is why he needs me to document it.

John Hart knows how the DUJOUR.4TH file works. Why doesn't Tom Hart just ask his brother
John Hart for this information? Most likely John Hart has now belatedly joined the crowd of
family members and associates who refuse to speak to him. So, Tom Hart the salesman
is now on comp.lang.forth selling the chip that he doesn't understand, impersonating John Hart,
and also trying to talk me into documenting DUJOUR.4TH etc. for free as "something to do."

The following is me some years ago describing the DUJOUR.4TH file in MFX.
This needs to be modified every time that new instructions are added, changed or removed.
I put all of this in one file because the instruction set was being changed on a daily basis
(hence the name DUJOUR) and I made it easy to define what the instructions do.

On Sunday, June 26, 2016 at 3:46:20 PM UTC-7, hughag...@gmail.com wrote:
> On Sunday, June 26, 2016 at 3:16:03 AM UTC-7, Anton Ertl wrote:
> > Sure, but what you can do in simulation is limited, and simulation is
> > not free, either. At some point you have gone as far as practical
> > with simulation, and then you build it, and it can still turn out that
> > the interconnect is not up to the demands of real software for this
> > chip.
> The MiniForth was developed entirely with a simulator.
> The physical hardware didn't exist until almost the end of the project.
>
> I wrote the assembler in such a way that it would not only generate the machine-code
> for the target processor, but would also generate a Forth program that ran on the host computer
> and simulated the target program. This results in much faster simulation than interpreting
> the target machine opcodes at run-time as done in most simulators.
>
> I had a "dujour" file that described the hardware-design and which could be changed on a daily basis
> as the hardware-design changed, with the rest of the assembler/simulator remaining unchanged.
> Simulation of hardware is all about experimentation --- this is bottom-up design for hardware,
> similar to the bottom-up design that has always been used for software in the Forth world.
> > Why should a software maker invest in verifying a hardware design,
> > especially one based on untried principles?
> The principles are not untried --- they are tried out in simulation, which is the point of simulation ---
> you are not really making any sense.
> > Sure, they write some benchmarks to show off the capabilities of their
> > chips, but they certainly won't be doing any multi-year software
> > development effort for it. Maybe the hardware department will
> > cooperate with a software department which will explore software
> > scalability to some areas opened up by that chip, but the result will
> > also just be proof-of-concepts.
> The idea of a "software maker" being distinct from the "chip maker" is absurd.
> I really get the impression that you don't have experience in real-world projects --- you just teach
> in the classroom.
>
> The goal with the MiniForth was to develop a chip capable of running the motion-control program
> at the required speed (fast enough to significantly beat the competition who were using
> an MC68000 board) --- the motion-control program already existed and ran on the 80c320,
> but too slow. The hardware design was changed repeatedly (often on a daily basis) as needed.
> The software was written for the existing hardware design --- if it proved too slow, then the hardware
> design was modified to fix whatever the bottleneck was in performance --- this was done repeatedly
> until the software worked at the required speed.
>
> The idea of building a new processor without having a specific goal in mind (a specific program
> that needs to run at a specific speed) seems absurd to me. If you don't have a goal,
> how will you know when your work is done or even if you are working in the right direction?

On Monday, November 8, 2021 at 11:11:29 PM UTC-7, johnro...@gmail.com wrote:
> On Monday, November 8, 2021 at 2:08:26 AM UTC-7, jpit...@gmail.com wrote:
> > On Monday, 8 November 2021 at 08:19:48 UTC, Jurgen Pitaske wrote:
> Jurgen,
> When the op code definition file for our new 32bit Forth FPGA processors is complete I'll post it.
> Explaining how it controls the MFX compiler will give Hugh something to do ;
> and give this thread a chance to end on a positive note.
>
> jrh

John Hart's email is: jhart@testra.com
This email is a spoof: johnrogerhart@gmail.com
The pig Juergen Pintaske is Tom Hart's friend --- John Hart doesn't consort with pigs.

It is obvious that this post is not John Hart, the chip designer, because the writer
does not know the difference between a processor opcode and a processor instruction.
Whoever wrote this (almost certainly the liar Tom Hart) is using the word "opcode"
to mean: "instruction."

The retarded sales clown Tom Hart deserves to be made a Forth-200x committee member!
I doubt that there is anybody on the Forth-200x committee who knows the difference between
a processor opcode and a processor instruction --- they are retarded clowns too!
Peter Knaggs failed to implement a linked list, Bernd Paysan and Anton Ertl failed to invent
rquotations, Stephen Pelc failed to implement a string-stack. Forth-200x is a failure!

I challenge all of the comp.lang.forth internet experts to put their heads together and provide
an explanation for how processor opcodes differ from processor instructions, and also
explain how they are related --- this should give you something to do!

On 13/11/2021 07:59, Hugh Aguilar wrote:
> On Monday, November 8, 2021 at 11:11:29 PM UTC-7, johnro...@gmail.com wrote:
>> On Monday, November 8, 2021 at 2:08:26 AM UTC-7, jpit...@gmail.com wrote:
>> > On Monday, 8 November 2021 at 08:19:48 UTC, Jurgen Pitaske wrote:
>> Jurgen,
>> When the op code definition file for our new 32bit Forth FPGA processors is complete I'll post it.
>> Explaining how it controls the MFX compiler will give Hugh something to do ;
>> and give this thread a chance to end on a positive note.
>>
>> jrh
>
> John Hart's email is: jhart@testra.com
> This email is a spoof: johnrogerhart@gmail.com
> The pig Juergen Pintaske is Tom Hart's friend --- John Hart doesn't consort with pigs.
>
> It is obvious that this post is not John Hart, the chip designer, because the writer
> does not know the difference between a processor opcode and a processor instruction.
> Whoever wrote this (almost certainly the liar Tom Hart) is using the word "opcode"
> to mean: "instruction."
>
> The retarded sales clown Tom Hart deserves to be made a Forth-200x committee member!
> I doubt that there is anybody on the Forth-200x committee who knows the difference between
> a processor opcode and a processor instruction --- they are retarded clowns too!
> Peter Knaggs failed to implement a linked list, Bernd Paysan and Anton Ertl failed to invent
> rquotations, Stephen Pelc failed to implement a string-stack. Forth-200x is a failure!
>
> I challenge all of the comp.lang.forth internet experts to put their heads together and provide
> an explanation for how processor opcodes differ from processor instructions, and also
> explain how they are related --- this should give you something to do!
>

It appears the OP has found you something to do as it's kept you busy for over
two years. 'Straight Forth' et al can safely be forgotten.

On Saturday, 13 November 2021 at 02:49:39 UTC, dxforth wrote:
> On 13/11/2021 07:59, Hugh Aguilar wrote:
> > On Monday, November 8, 2021 at 11:11:29 PM UTC-7, johnro...@gmail.com wrote:
> >> On Monday, November 8, 2021 at 2:08:26 AM UTC-7, jpit...@gmail.com wrote:
> >> > On Monday, 8 November 2021 at 08:19:48 UTC, Jurgen Pitaske wrote:
> >> Jurgen,
> >> When the op code definition file for our new 32bit Forth FPGA processors is complete I'll post it.
> >> Explaining how it controls the MFX compiler will give Hugh something to do ;
> >> and give this thread a chance to end on a positive note.
> >>
> >> jrh
> >
> > John Hart's email is: jh...@testra.com
> > This email is a spoof: johnro...@gmail.com
> > The pig Juergen Pintaske is Tom Hart's friend --- John Hart doesn't consort with pigs.
> >
> > It is obvious that this post is not John Hart, the chip designer, because the writer
> > does not know the difference between a processor opcode and a processor instruction.
> > Whoever wrote this (almost certainly the liar Tom Hart) is using the word "opcode"
> > to mean: "instruction."
> >
> > The retarded sales clown Tom Hart deserves to be made a Forth-200x committee member!
> > I doubt that there is anybody on the Forth-200x committee who knows the difference between
> > a processor opcode and a processor instruction --- they are retarded clowns too!
> > Peter Knaggs failed to implement a linked list, Bernd Paysan and Anton Ertl failed to invent
> > rquotations, Stephen Pelc failed to implement a string-stack. Forth-200x is a failure!
> >
> > I challenge all of the comp.lang.forth internet experts to put their heads together and provide
> > an explanation for how processor opcodes differ from processor instructions, and also
> > explain how they are related --- this should give you something to do!
> >
> It appears the OP has found you something to do as it's kept you busy for over
> two years. 'Straight Forth' et al can safely be forgotten.

Even better than that.

As he stated himself in his post above:

>> He says above that describing how MFX works, especially the DUJOUR.4TH file, will give me
>> something to do. He wants me to document it for free --- he doesn't know how it works,
>> which is why he needs me to document it.

Hugh is admitting that he is a crap sleezy programmer.

He intentionally did not document this piece of SW a quarter of a century ago.

Probably intentionally, so Testra has to get him back and pay again for work he did badly when there is an issue.

DISGUSTING

On 13/11/2021 19:19, Jurgen Pitaske wrote:
> On Saturday, 13 November 2021 at 02:49:39 UTC, dxforth wrote:
>> On 13/11/2021 07:59, Hugh Aguilar wrote:
>> > On Monday, November 8, 2021 at 11:11:29 PM UTC-7, johnro...@gmail.com wrote:
>> >> On Monday, November 8, 2021 at 2:08:26 AM UTC-7, jpit...@gmail.com wrote:
>> >> > On Monday, 8 November 2021 at 08:19:48 UTC, Jurgen Pitaske wrote:
>> >> Jurgen,
>> >> When the op code definition file for our new 32bit Forth FPGA processors is complete I'll post it.
>> >> Explaining how it controls the MFX compiler will give Hugh something to do ;
>> >> and give this thread a chance to end on a positive note.
>> >>
>> >> jrh
>> >
>> > John Hart's email is: jh...@testra.com
>> > This email is a spoof: johnro...@gmail.com
>> > The pig Juergen Pintaske is Tom Hart's friend --- John Hart doesn't consort with pigs.
>> >
>> > It is obvious that this post is not John Hart, the chip designer, because the writer
>> > does not know the difference between a processor opcode and a processor instruction.
>> > Whoever wrote this (almost certainly the liar Tom Hart) is using the word "opcode"
>> > to mean: "instruction."
>> >
>> > The retarded sales clown Tom Hart deserves to be made a Forth-200x committee member!
>> > I doubt that there is anybody on the Forth-200x committee who knows the difference between
>> > a processor opcode and a processor instruction --- they are retarded clowns too!
>> > Peter Knaggs failed to implement a linked list, Bernd Paysan and Anton Ertl failed to invent
>> > rquotations, Stephen Pelc failed to implement a string-stack. Forth-200x is a failure!
>> >
>> > I challenge all of the comp.lang.forth internet experts to put their heads together and provide
>> > an explanation for how processor opcodes differ from processor instructions, and also
>> > explain how they are related --- this should give you something to do!
>> >
>> It appears the OP has found you something to do as it's kept you busy for over
>> two years. 'Straight Forth' et al can safely be forgotten.
>
> Even better than that.
>
> As he stated himself in his post above:
>
>>> He says above that describing how MFX works, especially the DUJOUR.4TH file, will give me
>>> something to do. He wants me to document it for free --- he doesn't know how it works,
>>> which is why he needs me to document it.
>
> Hugh is admitting that he is a crap sleezy programmer.
>
> He intentionally did not document this piece of SW a quarter of a century ago.
>
> Probably intentionally, so Testra has to get him back and pay again for work he did badly when there is an issue.

JRH's statement seems clear to me. He'll post the definition table for the new
processor when it's complete after which Hugh can explain it to the rest of us
should he so choose. That doesn't sound like a designer who is confused or in
need of assistance.

On Saturday, November 13, 2021 at 2:26:33 AM UTC-7, dxforth wrote:
> On 13/11/2021 19:19, Jurgen Pitaske wrote:
> > On Saturday, 13 November 2021 at 02:49:39 UTC, dxforth wrote:
> >> On 13/11/2021 07:59, Hugh Aguilar wrote:
> >> > On Monday, November 8, 2021 at 11:11:29 PM UTC-7, johnro...@gmail.com wrote:
> >> >> On Monday, November 8, 2021 at 2:08:26 AM UTC-7, jpit...@gmail.com wrote:
> >> >> > On Monday, 8 November 2021 at 08:19:48 UTC, Jurgen Pitaske wrote:
> >> >> Jurgen,
> >> >> When the op code definition file for our new 32bit Forth FPGA processors is complete I'll post it.
> >> >> Explaining how it controls the MFX compiler will give Hugh something to do ;
> >> >> and give this thread a chance to end on a positive note.
> >> >>
> >> >> jrh
> >> >
> >> > John Hart's email is: jh...@testra.com
> >> > This email is a spoof: johnro...@gmail.com
> >> > The pig Juergen Pintaske is Tom Hart's friend --- John Hart doesn't consort with pigs.
> >> >
> >> > It is obvious that this post is not John Hart, the chip designer, because the writer
> >> > does not know the difference between a processor opcode and a processor instruction.
> >> > Whoever wrote this (almost certainly the liar Tom Hart) is using the word "opcode"
> >> > to mean: "instruction."
> >> >
> >> > The retarded sales clown Tom Hart deserves to be made a Forth-200x committee member!
> >> > I doubt that there is anybody on the Forth-200x committee who knows the difference between
> >> > a processor opcode and a processor instruction --- they are retarded clowns too!
> >> > Peter Knaggs failed to implement a linked list, Bernd Paysan and Anton Ertl failed to invent
> >> > rquotations, Stephen Pelc failed to implement a string-stack. Forth-200x is a failure!
> >> >
> >> > I challenge all of the comp.lang.forth internet experts to put their heads together and provide
> >> > an explanation for how processor opcodes differ from processor instructions, and also
> >> > explain how they are related --- this should give you something to do!
> >> >
> >> It appears the OP has found you something to do as it's kept you busy for over
> >> two years. 'Straight Forth' et al can safely be forgotten.
> >
> > Even better than that.
> >
> > As he stated himself in his post above:
> >
> >>> He says above that describing how MFX works, especially the DUJOUR.4TH file, will give me
> >>> something to do. He wants me to document it for free --- he doesn't know how it works,
> >>> which is why he needs me to document it.
> >
> > Hugh is admitting that he is a crap sleezy programmer.
> >
> > He intentionally did not document this piece of SW a quarter of a century ago.
> >
> > Probably intentionally, so Testra has to get him back and pay again for work he did badly when there is an issue.

> JRH's statement seems clear to me. He'll post the definition table for the new
> processor when it's complete after which Hugh can explain it to the rest of us
> should he so choose. That doesn't sound like a designer who is confused or in
> need of assistance.

Why don't you prime the pump by explaining what the difference is between a
processor instruction and a processor opcode?

I think that you are confused and in need of assistance --- just like Tom Hart
who uses the word "opcode definition file" to mean "instruction definition file"
(this is DUJOUR.4TH in my MFX assembler/simulator).

The JRH that you refer to is not John Hart --- this is Tom Hart impersonating
John Hart --- most likely, John Hart has abandoned the processor because
Tom Hart has embarrassed him with habitual lying, so now Tom Hart is going to
post the description of MFX in the hope that somebody (me) will explain to him
how it works --- back in 1994 when I wrote MFX, Tom Hart showed no interest
in learning how to program in MFX assembly-language, but a quarter of a century
later he realizes that he should have learned something about the technical aspect.

Note that MFX was written in 32-bit UR/Forth running under an MS-DOS extender.
Since then Testra has upgraded 32-bit UR/Forth to run under Windows-10.
Testra was able to make this upgrade because they have the source-code for
UR/Forth, but they had to sign an NDA, so they can't make this upgraded UR/Forth
available outside of Testra --- so, nobody can run MFX outside of Testra.
You can't program in MFX unless you are an employee of Testra --- this was true
back in 1995 too, which is why it was obvious to me that MFX was a dead-end.

On 15/11/2021 09:04, Hugh Aguilar wrote:
> On Saturday, November 13, 2021 at 2:26:33 AM UTC-7, dxforth wrote:
> ...
>> JRH's statement seems clear to me. He'll post the definition table for the new
>> processor when it's complete after which Hugh can explain it to the rest of us
>> should he so choose. That doesn't sound like a designer who is confused or in
>> need of assistance.
>
> Why don't you prime the pump by explaining what the difference is between a
> processor instruction and a processor opcode?

I'm not making a pitch to be re-employed. You explain it.