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devel / comp.arch.fpga / Re: PCB Layout for BGAs

SubjectAuthor
* PCB Layout for BGAsgnuarm.del...@gmail.com
+* Re: PCB Layout for BGAsDavid Brown
|`* Re: PCB Layout for BGAsgnuarm.del...@gmail.com
| `* Re: PCB Layout for BGAsDavid Brown
|  `* Re: PCB Layout for BGAsgnuarm.del...@gmail.com
|   `* Re: PCB Layout for BGAsDavid Brown
|    `* Re: PCB Layout for BGAsgnuarm.del...@gmail.com
|     +* Re: PCB Layout for BGAsStef
|     |`* Re: PCB Layout for BGAsgnuarm.del...@gmail.com
|     | +* Re: PCB Layout for BGAsStef
|     | |`* Re: PCB Layout for BGAsgnuarm.del...@gmail.com
|     | | `* Re: PCB Layout for BGAsjan Coombs
|     | |  `* Re: PCB Layout for BGAsgnuarm.del...@gmail.com
|     | |   `* Re: PCB Layout for BGAsDavid Brown
|     | |    `* Re: PCB Layout for BGAsgnuarm.del...@gmail.com
|     | |     `- Re: PCB Layout for BGAsDavid Brown
|     | `* Re: PCB Layout for BGAsMichael Schwingen
|     |  `- Re: PCB Layout for BGAsgnuarm.del...@gmail.com
|     `* Re: PCB Layout for BGAsMichael Schwingen
|      `* Re: PCB Layout for BGAsgnuarm.del...@gmail.com
|       +* Re: PCB Layout for BGAsDavid Brown
|       |`* Re: PCB Layout for BGAsgnuarm.del...@gmail.com
|       | `- Re: PCB Layout for BGAsDavid Brown
|       `* Re: PCB Layout for BGAsMichael Schwingen
|        `* Re: PCB Layout for BGAsgnuarm.del...@gmail.com
|         `* Re: PCB Layout for BGAsMichael Schwingen
|          `- Re: PCB Layout for BGAsDavid Brown
+- Re: PCB Layout for BGAsTheo
+* Re: PCB Layout for BGAsJohn Larkin
|`* Re: PCB Layout for BGAsgnuarm.del...@gmail.com
| `* Re: PCB Layout for BGAsJohn Larkin
|  `* Re: PCB Layout for BGAsgnuarm.del...@gmail.com
|   `* Re: PCB Layout for BGAsJohn Larkin
|    `* Re: PCB Layout for BGAsgnuarm.del...@gmail.com
|     +* Re: PCB Layout for BGAsRichard Damon
|     |`* Re: PCB Layout for BGAsgnuarm.del...@gmail.com
|     | `- Re: PCB Layout for BGAsRichard Damon
|     `* Re: PCB Layout for BGAsJohn Larkin
|      `* Re: PCB Layout for BGAsgnuarm.del...@gmail.com
|       `* Re: PCB Layout for BGAsJohn Larkin
|        `* Re: PCB Layout for BGAsgnuarm.del...@gmail.com
|         `* Re: PCB Layout for BGAsJohn Larkin
|          `* Re: PCB Layout for BGAsgnuarm.del...@gmail.com
|           `* Re: PCB Layout for BGAsJohn Larkin
|            `* Re: PCB Layout for BGAsgnuarm.del...@gmail.com
|             `- Re: PCB Layout for BGAsJohn Larkin
`* Re: PCB Layout for BGAsMike Randelzhofer
 +* Re: PCB Layout for BGAsgnuarm.del...@gmail.com
 |`- Re: PCB Layout for BGAsgnuarm.del...@gmail.com
 `- Re: PCB Layout for BGAsDavid Brown

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Re: PCB Layout for BGAs

<tpormd$18pth$1@dont-email.me>

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From: david.br...@hesbynett.no (David Brown)
Newsgroups: comp.arch.fpga
Subject: Re: PCB Layout for BGAs
Date: Thu, 12 Jan 2023 12:42:01 +0100
Organization: A noiseless patient Spider
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 by: David Brown - Thu, 12 Jan 2023 11:42 UTC

On 11/01/2023 13:49, gnuarm.del...@gmail.com wrote:
> On Wednesday, January 11, 2023 at 5:42:23 AM UTC-5, David Brown
> wrote:
>> On 10/01/2023 23:44, gnuarm.del...@gmail.com wrote:
>>> On Tuesday, January 10, 2023 at 1:35:24 PM UTC-5, Michael
>>> Schwingen wrote:
>>>> On 2023-01-09, gnuarm.del...@gmail.com
>>>> <gnuarm.del...@gmail.com> wrote:
>>>>>
>>>>> I'm concerned about adding cost for the boards, cost for the
>>>>> assembly and just an easy road forward. I spend the last two
>>>>> years building 8,000 units when the CODEC factory burnt down.
>>>>> The customer knows about this issue, but the previous CM
>>>>> turned flaky on me and all but stopped delivering product.
>>>>>
>>>>> I have a new CM, but I don't want to go through production
>>>>> problems again.
>>>> 0.8mm BGA should be no problem for any reputable CM -
>>>> fine-pitch QFP is usually more trouble.
>>>
>>> Part of my problem is a lack of having designed with BGAs before.
>>> I can find footprint recommendations, but they are different for
>>> every manufacturer. It didn't occur to me that this might be
>>> because even though they have the same pitch and ball count, they
>>> may not have the same ball size.
>>>
>>> The two primary choices right now are a 196 ball, 1.0 mm pitch
>>> and 256 ball, 0.8 mm pitch. Can you share the design rules you
>>> used for these parts?
>>>
>> The board stackup, routing and bypassing recommendations from FPGA
>> manufacturers are basically bollocks. I believe it is primarily a
>> matter of being able to fob off complaints and support requests by
>> saying "Did you follow our layout application notes, impossible
>> though they may be? If not, it's not /our/ fault that you have
>> problems."
>>
>> OK, that's a bit of an exaggeration, but you can ignore the
>> suggestions of 16 layers with 8 different power planes and a dozen
>> different capacitor sizes mounted directly below the device.
>
> I see the opposite. When FPGA makers offer routing suggestions, they
> often provide one for routing of 100% of I/O pins, and another, using
> fewer layers, routing a portion of the I/O pins. So clearly they are
> trying to optimize cost of the boards for the user. No sign of
> CYA.
>

Fair enough. Certainly you want to look at all the information you can
here - you just have to be aware that some of it will be conflicting,
and some of it will be overkill. I read somewhere (a long time ago, and
I've forgotten the details) of someone who initially made their design
following application notes for bypass capacitors. Then to save costs,
they depopulated about 90% of these capacitors, basically at random.
There were no measurable differences in signal integrity, EMC results,
or any functionality.

>
>> Yes, there are complications for BGA layouts. And I'm afraid you
>> are going to have to do some research, some learning, and some
>> discussions with both PCB manufacturers (or their proxies) and
>> board builders.
>>
>> For the same pitch of BGA, there can be different sized balls, and
>> different sized pads on the underside of the BGA device which will
>> affect the shape of the ball after soldering.
>
> I haven't done a survey to check this yet. Do you know this for a
> fact?

Yes.

BGA balls are attached to circular pads on the underside of the BGA
package, and the size of these pads can be different for different
packages with the same pitch. In general, you get the mechanically
strongest bond when the pads on the pcb (or the opening in the solder
mask, for solder mask defined pads) is the same size. But that does not
mean you /always/ want them to be the same as there are other factors in
the trade-offs, and it's quite rare that mechanical strength is
critical. (If you are gluing on a large heatsink, without screws, and
then mounting the board upside down in a high vibration environment,
you'll have different requirements from a "normal" usage.)

>
>
>> Pad size on the pcb has different options. You have a key decision
>> between solder mask defined and non-solder mask defined pads, which
>> affects mechanical strength, thermal stability, solder paste masks,
>> routeability, and manufacturing requirements. And BGA soldering has
>> different requirements in production than non-BGA devices.
>>
>>
>> I have no doubt that this is something you can master quite quickly
>> - it's not /that/ hard. But it's not something you can learn just
>> by a thread on a newsgroup.
>
> It's not "hard", it's "hard" to find the information for layout
> recommendations from each FPGA vendor. I'm going to need to put
> together a compendium of layout information, before I can compare
> vendors. The vendors may make it easy for me, based on availability
> and pricing. Xilinx is not in the running unless I can get someone
> there to give assurance of better supply in six months. Right now
> I'll have to buy every part in inventory of several combinations of
> speed and temperature, to build the order I have coming.
>

That's the unfortunate reality these days. Find out what you can get
hold of, check if it looks good enough, then buy the stock. There's no
point in finding out that vendor X has good layout and manufacturing
information, or vendor Y has good toolchains, if you can only get parts
from vendor Z. (This is not news to you, of course - I'm just
sympathising.)

Re: PCB Layout for BGAs

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From: news-151...@discworld.dascon.de (Michael Schwingen)
Newsgroups: comp.arch.fpga
Subject: Re: PCB Layout for BGAs
Date: 12 Jan 2023 13:36:33 GMT
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 by: Michael Schwingen - Thu, 12 Jan 2023 13:36 UTC

On 2023-01-12, gnuarm.del...@gmail.com <gnuarm.deletethisbit@gmail.com> wrote:
>> I have a 529 pin BGA with 0.8mm pitch. SMD pads for the BGA are 0.4mm, vias
>> are also 0.4mm with 0.2mm drill. Using these rules, a via fits nicely
>> between 4 BGA pads.
>
> You would need to use 5 mil trace and space to get between the pads. That
> doesn't sound too bad. Via to pad is 6.5 mil, again good.

Trace width in the BGA area is 0.11mm (for data lines).

> Where did you get your pad size numbers? Your via pad only gives you 4
> mil annular ring. That sounds a bit tight.
> To make that a 5 mil annular
> ring would shorten the 6.5 mil via to pad space to 5.5 mil, still good.
> Why did you choose a 0.4 mm pad?

That is the minimum given by our PCB manufacturer - small via pads allow for
bigger traces where needed (power traces, despite using a 8-layer PCB).

That is the area where you can fine tune after discussion with your PCB
manufacturer. Some may like a bigger annular ring, some may prefer smaller
ring and more pad-to-trace clearance.

https://www.nxp.com/docs/en/package-information/PBGAPRES.pdf

has some information about the BGA pad design. Our BGA has 0.45mm pads on
the BGA side, so the 0.4mm pads are on the lower end of the recommended
range.

> I asked my CM the general question of their BGA assembly experience and an
> estimated cost increment for going from a 100QFP to the 196 ball, 1.0 mm
> pitch BGA and 256 ball, 0.8 mm BGA. We'll see what they come up with. If
> they can give me a dollar figure, they should be able to give me
> dimensions they are comfortable working with.

I would expect pick & place to be easier for the 0.8mm BGA than the TQFP.
Cost increase will probably happen at the PCB level (small annular ring, or
more expensive surface finish - TQFP may work with HASL, BGA needs a flatter
finish. However, ENIG is not that expensive nowadays.)

cu
Michael
--
Some people have no respect of age unless it is bottled.

Re: PCB Layout for BGAs

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From: david.br...@hesbynett.no (David Brown)
Newsgroups: comp.arch.fpga
Subject: Re: PCB Layout for BGAs
Date: Thu, 12 Jan 2023 16:06:37 +0100
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 by: David Brown - Thu, 12 Jan 2023 15:06 UTC

On 12/01/2023 14:36, Michael Schwingen wrote:
> On 2023-01-12, gnuarm.del...@gmail.com <gnuarm.deletethisbit@gmail.com> wrote:

>> I asked my CM the general question of their BGA assembly experience and an
>> estimated cost increment for going from a 100QFP to the 196 ball, 1.0 mm
>> pitch BGA and 256 ball, 0.8 mm BGA. We'll see what they come up with. If
>> they can give me a dollar figure, they should be able to give me
>> dimensions they are comfortable working with.
>
> I would expect pick & place to be easier for the 0.8mm BGA than the TQFP.
> Cost increase will probably happen at the PCB level (small annular ring, or
> more expensive surface finish - TQFP may work with HASL, BGA needs a flatter
> finish. However, ENIG is not that expensive nowadays.)
>

Yes, BGAs can often be easier to place than TQFP's - you have a bigger
pitch, and they "float" to the correct place even if there is a slight
placement error.

On the other hand, you need better control of the soldering parameters,
and they are harder if you have a board that has awkward heat flow -
many high components nearby, or big thermal masses. And it is harder to
check connectivity and good quality soldering.

A good production facility will have tools to help here. They will do
the first boards with temperature probes between the balls, and X-Ray to
check the quality of the soldering. Make sure you have a production
house that is not scared to give you feedback - many far eastern places
will just do their best with what you give them, and never tell you how
to improve your layout.

Re-work is, obviously, far more difficult with BGAs.

Re: PCB Layout for BGAs

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Subject: Re: PCB Layout for BGAs
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 by: John Larkin - Sat, 14 Jan 2023 04:39 UTC

On Sat, 7 Jan 2023 09:49:24 -0800 (PST), "gnuarm.del...@gmail.com"
<gnuarm.deletethisbit@gmail.com> wrote:

>A small board with a 100QFP is being redesigned for a new FPGA due to obsolescence. Gowin makes a 100QFP device that would be a good fit, but my customer has said "no" to the 100% Chinese brand... US government customers, ya know!
>
>So now I'm looking at a BGA. I don't want to get into fine PCB design rules, so 1.0 mm ball pitch is my preference. The only devices I can find that fit on the board have 196 or 256 pins. But the real problem is availability.
>
>Digikey has a few of the XC7S15-1FTGB196I and more a scheduled for delivery in April. Add in the various speed and temperature flavors trickling in (mostly in April) and I should be ok for the initial delivery in August... if I can get my hands on those. I don't know if Digikey factors in the backlog orders in these counts.
>
>Mouser shows great inventory of Efinix parts, particularly the T13 and T20 in a 0.8 mm 256 pin BGA, 10s of thousands in stock. But I'd rather work with a 1.0 mm BGA. Oddly enough, LCSC shows part numbers, but zero inventory.
>
>Anyone work with 0.8 mm BGAs? What PWB feature dimensions did you use? Did this impact the PWB cost?

The 0.8 mm 256-ball T20 isn't bad...

https://www.dropbox.com/s/xjqgj2pz9mdhtma/P941_FPGA.jpg?raw=1

The BGA pads are 16 mils. 8 mil drills on the BGA vias. 6 mil traces
mostly, except for the 50 ohm monsters. No big deal these days. Works
great.

We considered a T8 for a simpler application, but its 0.5 mm ball
pitch looked nasty.

The efinix tool chain looks like it was developed in someone's garage,
which is actually praise. It's free and simple and just works without
200 gbyte downloads and doing battle with FlexLM.

Re: PCB Layout for BGAs

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 by: gnuarm.del...@gmail. - Sat, 14 Jan 2023 05:20 UTC

On Saturday, January 14, 2023 at 12:39:49 AM UTC-4, John Larkin wrote:
> On Sat, 7 Jan 2023 09:49:24 -0800 (PST), "gnuarm.del...@gmail.com"
> <gnuarm.del...@gmail.com> wrote:
>
> >A small board with a 100QFP is being redesigned for a new FPGA due to obsolescence. Gowin makes a 100QFP device that would be a good fit, but my customer has said "no" to the 100% Chinese brand... US government customers, ya know!
> >
> >So now I'm looking at a BGA. I don't want to get into fine PCB design rules, so 1.0 mm ball pitch is my preference. The only devices I can find that fit on the board have 196 or 256 pins. But the real problem is availability.
> >
> >Digikey has a few of the XC7S15-1FTGB196I and more a scheduled for delivery in April. Add in the various speed and temperature flavors trickling in (mostly in April) and I should be ok for the initial delivery in August... if I can get my hands on those. I don't know if Digikey factors in the backlog orders in these counts.
> >
> >Mouser shows great inventory of Efinix parts, particularly the T13 and T20 in a 0.8 mm 256 pin BGA, 10s of thousands in stock. But I'd rather work with a 1.0 mm BGA. Oddly enough, LCSC shows part numbers, but zero inventory.
> >
> >Anyone work with 0.8 mm BGAs? What PWB feature dimensions did you use? Did this impact the PWB cost?
> The 0.8 mm 256-ball T20 isn't bad...
>
> https://www.dropbox.com/s/xjqgj2pz9mdhtma/P941_FPGA.jpg?raw=1

I can't really see much detail. It looks like there are virtually no pads on the vias under the BGA. What size are they?

> The BGA pads are 16 mils. 8 mil drills on the BGA vias. 6 mil traces
> mostly, except for the 50 ohm monsters. No big deal these days. Works
> great.

Yeah, 0.8 mm pad centers are doable, but I don't know where the line is for higher pricing on the PWB. The via pads seem to be pushing the technology line at JLCPCB. Not that I'm using them, but if they can do it, pretty much anyone should be able to do it. They build 0.45 mm via pads and 0.2 mm drills (5 mil annular ring and 8 mil drill), but charge extra for a 0.4 mm via pads (4 mil annular ring).

> We considered a T8 for a simpler application, but its 0.5 mm ball
> pitch looked nasty.

I didn't price the T8, because they use the logic cells for routing in a way they don't explain, so no way to factor it in. The T12 would be gravy for my design I expect, but it's only $1 more for the T20, so why not? If it saves a day of work, it's a break even for 1,000 units. If it enables a future expansion, it's worth much more than that! Both parts seem to have the same pin out, including I/O counts, so switching between them should only be a recompile.

> The efinix tool chain looks like it was developed in someone's garage,
> which is actually praise. It's free and simple and just works without
> 200 gbyte downloads and doing battle with FlexLM.

The large downloads are from the support for the many, many products the big three FPGA companies sell. Don't expect Efinix tools to continue to be small... and they aren't really free. You have to buy a board. That's more than I've paid for tools from FPGA vendors.

I'd really like to use the Gowin parts (LQFP100). But the customer is hinky about parts from a Chinese company. They sell stuff to the US Government..

--

Rick C.

++- Get 1,000 miles of free Supercharging
++- Tesla referral code - https://ts.la/richard11209

Re: PCB Layout for BGAs

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 by: John Larkin - Sat, 14 Jan 2023 16:07 UTC

On Fri, 13 Jan 2023 21:20:50 -0800 (PST), "gnuarm.del...@gmail.com"
<gnuarm.deletethisbit@gmail.com> wrote:

>On Saturday, January 14, 2023 at 12:39:49 AM UTC-4, John Larkin wrote:
>> On Sat, 7 Jan 2023 09:49:24 -0800 (PST), "gnuarm.del...@gmail.com"
>> <gnuarm.del...@gmail.com> wrote:
>>
>> >A small board with a 100QFP is being redesigned for a new FPGA due to obsolescence. Gowin makes a 100QFP device that would be a good fit, but my customer has said "no" to the 100% Chinese brand... US government customers, ya know!
>> >
>> >So now I'm looking at a BGA. I don't want to get into fine PCB design rules, so 1.0 mm ball pitch is my preference. The only devices I can find that fit on the board have 196 or 256 pins. But the real problem is availability.
>> >
>> >Digikey has a few of the XC7S15-1FTGB196I and more a scheduled for delivery in April. Add in the various speed and temperature flavors trickling in (mostly in April) and I should be ok for the initial delivery in August... if I can get my hands on those. I don't know if Digikey factors in the backlog orders in these counts.
>> >
>> >Mouser shows great inventory of Efinix parts, particularly the T13 and T20 in a 0.8 mm 256 pin BGA, 10s of thousands in stock. But I'd rather work with a 1.0 mm BGA. Oddly enough, LCSC shows part numbers, but zero inventory.
>> >
>> >Anyone work with 0.8 mm BGAs? What PWB feature dimensions did you use? Did this impact the PWB cost?
>> The 0.8 mm 256-ball T20 isn't bad...
>>
>> https://www.dropbox.com/s/xjqgj2pz9mdhtma/P941_FPGA.jpg?raw=1
>
>I can't really see much detail. It looks like there are virtually no pads on the vias under the BGA. What size are they?

The BGAVIAs are 12.5 mil OD with 8 mil drills. The other vias on the
board STANDARDVIA and POWERVIA are bigger.

I have seen vias with no annullar ring, just a trace falling into a
hole, but the PCB houses don't like that.

Filled via-in-pad would be cool but that's complex and expensive. As
is buried vias.

>
>
>> The BGA pads are 16 mils. 8 mil drills on the BGA vias. 6 mil traces
>> mostly, except for the 50 ohm monsters. No big deal these days. Works
>> great.
>
>Yeah, 0.8 mm pad centers are doable, but I don't know where the line is for higher pricing on the PWB. The via pads seem to be pushing the technology line at JLCPCB. Not that I'm using them, but if they can do it, pretty much anyone should be able to do it. They build 0.45 mm via pads and 0.2 mm drills (5 mil annular ring and 8 mil drill), but charge extra for a 0.4 mm via pads (4 mil annular ring).

We use US suppliers for production boards, and they seem to think this
6-layer board is within the normal range. One advantage to using a big
FPGA (256 balls in this case) is that you don't have to go deep to hit
enough balls, so may save a PCB layer or two. The T20-256 is a nice
part and Digikey has 29,000 in stock.

Another project used a 484 ball Zynq and we used almost every ball.
Lots of different power pours too. That took 10 layers. Another recent
board has a 400-ball ZYNQ with a few unused PS pins and fits on 8
layers.

The ZYNQ has analog inputs but, crazily, they are all differential so
they make you ground a perfectly good i/o pin for every analog input
that you want.

>
>
>> We considered a T8 for a simpler application, but its 0.5 mm ball
>> pitch looked nasty.
>
>I didn't price the T8, because they use the logic cells for routing in a way they don't explain, so no way to factor it in. The T12 would be gravy for my design I expect, but it's only $1 more for the T20, so why not? If it saves a day of work, it's a break even for 1,000 units. If it enables a future expansion, it's worth much more than that! Both parts seem to have the same pin out, including I/O counts, so switching between them should only be a recompile.
>
>
>> The efinix tool chain looks like it was developed in someone's garage,
>> which is actually praise. It's free and simple and just works without
>> 200 gbyte downloads and doing battle with FlexLM.
>
>The large downloads are from the support for the many, many products the big three FPGA companies sell. Don't expect Efinix tools to continue to be small... and they aren't really free. You have to buy a board. That's more than I've paid for tools from FPGA vendors.

$150! That's in the noise, and an eval board is good anyhow.


>
>I'd really like to use the Gowin parts (LQFP100). But the customer is hinky about parts from a Chinese company. They sell stuff to the US Government.

Yeah, we have a lot of aerospace customers and avoid Chinese parts.

Re: PCB Layout for BGAs

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 by: gnuarm.del...@gmail. - Sat, 14 Jan 2023 18:05 UTC

On Saturday, January 14, 2023 at 12:08:03 PM UTC-4, John Larkin wrote:
> On Fri, 13 Jan 2023 21:20:50 -0800 (PST), "gnuarm.del...@gmail.com"
> <gnuarm.del...@gmail.com> wrote:
>
> >On Saturday, January 14, 2023 at 12:39:49 AM UTC-4, John Larkin wrote:
> >> On Sat, 7 Jan 2023 09:49:24 -0800 (PST), "gnuarm.del...@gmail.com"
> >> <gnuarm.del...@gmail.com> wrote:
> >>
> >> >A small board with a 100QFP is being redesigned for a new FPGA due to obsolescence. Gowin makes a 100QFP device that would be a good fit, but my customer has said "no" to the 100% Chinese brand... US government customers, ya know!
> >> >
> >> >So now I'm looking at a BGA. I don't want to get into fine PCB design rules, so 1.0 mm ball pitch is my preference. The only devices I can find that fit on the board have 196 or 256 pins. But the real problem is availability.
> >> >
> >> >Digikey has a few of the XC7S15-1FTGB196I and more a scheduled for delivery in April. Add in the various speed and temperature flavors trickling in (mostly in April) and I should be ok for the initial delivery in August.... if I can get my hands on those. I don't know if Digikey factors in the backlog orders in these counts.
> >> >
> >> >Mouser shows great inventory of Efinix parts, particularly the T13 and T20 in a 0.8 mm 256 pin BGA, 10s of thousands in stock. But I'd rather work with a 1.0 mm BGA. Oddly enough, LCSC shows part numbers, but zero inventory.
> >> >
> >> >Anyone work with 0.8 mm BGAs? What PWB feature dimensions did you use? Did this impact the PWB cost?
> >> The 0.8 mm 256-ball T20 isn't bad...
> >>
> >> https://www.dropbox.com/s/xjqgj2pz9mdhtma/P941_FPGA.jpg?raw=1
> >
> >I can't really see much detail. It looks like there are virtually no pads on the vias under the BGA. What size are they?
> The BGAVIAs are 12.5 mil OD with 8 mil drills. The other vias on the
> board STANDARDVIA and POWERVIA are bigger.

2.25 mil (0.057 mm) is a pretty narrow via ring. Why not have a larger via pad? You have just over 0.2 mm (8 mil) clearance between via pad and BGA pads. Is this narrow annular ring buying you something? You could use a 0..4 mm (16 mil) via pad for an annular ring of 0.1 mm (4 mil) and still have 0.165 mm (6.5 mil) clearance between ball pads and via pads. Do you feel that's not enough?

> I have seen vias with no annullar ring, just a trace falling into a
> hole, but the PCB houses don't like that.

No, and they don't like small annular rings, because that's a small target to drill. I run into boards that the PCB fab house made badly at the vias and they are disasters. The tiny cracks that develop are hard to find and don't repair well.

Efinix recommends 0.46 mm (18.1 mil) ball pad, 0.5 mm (20 mil) via pad and a 0.25 mm (10 mil) drill, with 0.1 mm (4 mil) trace/space and 0.085 mm (3.3 mil) clearance between ball pad and via pad. The trace/space seems fine, but I'd like more clearance between via and ball pads. The question is, where to shave it from? Shaving 2 mil from the via pad leaves 4 mil annular ring and 4.3 mil clearance. Shaving from the ball pad seems like a bad idea. But if it works...

This is something that should have a spreadsheet, with a diagram that adjusts the image to show the details. All the tradeoffs become apparent very quickly. lol

> Filled via-in-pad would be cool but that's complex and expensive. As
> is buried vias.
> >
> >
> >> The BGA pads are 16 mils. 8 mil drills on the BGA vias. 6 mil traces
> >> mostly, except for the 50 ohm monsters. No big deal these days. Works
> >> great.
> >
> >Yeah, 0.8 mm pad centers are doable, but I don't know where the line is for higher pricing on the PWB. The via pads seem to be pushing the technology line at JLCPCB. Not that I'm using them, but if they can do it, pretty much anyone should be able to do it. They build 0.45 mm via pads and 0.2 mm drills (5 mil annular ring and 8 mil drill), but charge extra for a 0.4 mm via pads (4 mil annular ring).
> We use US suppliers for production boards, and they seem to think this
> 6-layer board is within the normal range. One advantage to using a big
> FPGA (256 balls in this case) is that you don't have to go deep to hit
> enough balls, so may save a PCB layer or two. The T20-256 is a nice
> part and Digikey has 29,000 in stock.

I don't follow that exactly. If I could get a 100 ball BGA on 1.0 mm centers, I would have zero trouble with routing and breakout. That could be routed 100% on a double sided board. One side gets the two outer rings of pads leaving 6x6. The other layer routes the remainder. But FPGA companies don't like small packages. They have much more demand at the larger I/O counts. Xilinx has a 196 ball, 1.0 mm package, but not much inventory and lead time is the standard 52 weeks.

The real problem is having to use the packages that are in stock. Everything other than Efinix is 52 week lead time, which is not a real forecast, rather just the point where they stop counting.

> Another project used a 484 ball Zynq and we used almost every ball.
> Lots of different power pours too. That took 10 layers. Another recent
> board has a 400-ball ZYNQ with a few unused PS pins and fits on 8
> layers.

Yeah, when you have that many I/Os, it's tough to keep the layer count down..

> The ZYNQ has analog inputs but, crazily, they are all differential so
> they make you ground a perfectly good i/o pin for every analog input
> that you want.
> >
> >
> >> We considered a T8 for a simpler application, but its 0.5 mm ball
> >> pitch looked nasty.
> >
> >I didn't price the T8, because they use the logic cells for routing in a way they don't explain, so no way to factor it in. The T12 would be gravy for my design I expect, but it's only $1 more for the T20, so why not? If it saves a day of work, it's a break even for 1,000 units. If it enables a future expansion, it's worth much more than that! Both parts seem to have the same pin out, including I/O counts, so switching between them should only be a recompile.
> >
> >
> >> The efinix tool chain looks like it was developed in someone's garage,
> >> which is actually praise. It's free and simple and just works without
> >> 200 gbyte downloads and doing battle with FlexLM.
> >
> >The large downloads are from the support for the many, many products the big three FPGA companies sell. Don't expect Efinix tools to continue to be small... and they aren't really free. You have to buy a board. That's more than I've paid for tools from FPGA vendors.
> $150! That's in the noise, and an eval board is good anyhow.
> >
> >I'd really like to use the Gowin parts (LQFP100). But the customer is hinky about parts from a Chinese company. They sell stuff to the US Government.
> Yeah, we have a lot of aerospace customers and avoid Chinese parts.

Where exactly are Efinix parts made? Their parts say China on them.

--

Rick C.

+++ Get 1,000 miles of free Supercharging
+++ Tesla referral code - https://ts.la/richard11209

Re: PCB Layout for BGAs

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 by: John Larkin - Sat, 14 Jan 2023 19:17 UTC

On Sat, 14 Jan 2023 10:05:33 -0800 (PST), "gnuarm.del...@gmail.com"
<gnuarm.deletethisbit@gmail.com> wrote:

>On Saturday, January 14, 2023 at 12:08:03 PM UTC-4, John Larkin wrote:
>> On Fri, 13 Jan 2023 21:20:50 -0800 (PST), "gnuarm.del...@gmail.com"
>> <gnuarm.del...@gmail.com> wrote:
>>
>> >On Saturday, January 14, 2023 at 12:39:49 AM UTC-4, John Larkin wrote:
>> >> On Sat, 7 Jan 2023 09:49:24 -0800 (PST), "gnuarm.del...@gmail.com"
>> >> <gnuarm.del...@gmail.com> wrote:
>> >>
>> >> >A small board with a 100QFP is being redesigned for a new FPGA due to obsolescence. Gowin makes a 100QFP device that would be a good fit, but my customer has said "no" to the 100% Chinese brand... US government customers, ya know!
>> >> >
>> >> >So now I'm looking at a BGA. I don't want to get into fine PCB design rules, so 1.0 mm ball pitch is my preference. The only devices I can find that fit on the board have 196 or 256 pins. But the real problem is availability.
>> >> >
>> >> >Digikey has a few of the XC7S15-1FTGB196I and more a scheduled for delivery in April. Add in the various speed and temperature flavors trickling in (mostly in April) and I should be ok for the initial delivery in August... if I can get my hands on those. I don't know if Digikey factors in the backlog orders in these counts.
>> >> >
>> >> >Mouser shows great inventory of Efinix parts, particularly the T13 and T20 in a 0.8 mm 256 pin BGA, 10s of thousands in stock. But I'd rather work with a 1.0 mm BGA. Oddly enough, LCSC shows part numbers, but zero inventory.
>> >> >
>> >> >Anyone work with 0.8 mm BGAs? What PWB feature dimensions did you use? Did this impact the PWB cost?
>> >> The 0.8 mm 256-ball T20 isn't bad...
>> >>
>> >> https://www.dropbox.com/s/xjqgj2pz9mdhtma/P941_FPGA.jpg?raw=1
>> >
>> >I can't really see much detail. It looks like there are virtually no pads on the vias under the BGA. What size are they?
>> The BGAVIAs are 12.5 mil OD with 8 mil drills. The other vias on the
>> board STANDARDVIA and POWERVIA are bigger.
>
>2.25 mil (0.057 mm) is a pretty narrow via ring. Why not have a larger via pad?

I don't know. My PCB guy decides stuff like that. I'd guess that he
wanted it to pass some design rule check, or maybe he started metric.
The board houses haven't complained as far as I know.

You should do your own thing and check with whoever will make your
boards.

Re: PCB Layout for BGAs

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Subject: Re: PCB Layout for BGAs
From: gnuarm.d...@gmail.com (gnuarm.del...@gmail.com)
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 by: gnuarm.del...@gmail. - Sun, 15 Jan 2023 00:20 UTC

On Saturday, January 14, 2023 at 3:17:24 PM UTC-4, John Larkin wrote:
> On Sat, 14 Jan 2023 10:05:33 -0800 (PST), "gnuarm.del...@gmail.com"
> <gnuarm.del...@gmail.com> wrote:
>
> >On Saturday, January 14, 2023 at 12:08:03 PM UTC-4, John Larkin wrote:
> >> On Fri, 13 Jan 2023 21:20:50 -0800 (PST), "gnuarm.del...@gmail.com"
> >> <gnuarm.del...@gmail.com> wrote:
> >>
> >> >On Saturday, January 14, 2023 at 12:39:49 AM UTC-4, John Larkin wrote:
> >> >> On Sat, 7 Jan 2023 09:49:24 -0800 (PST), "gnuarm.del...@gmail.com"
> >> >> <gnuarm.del...@gmail.com> wrote:
> >> >>
> >> >> >A small board with a 100QFP is being redesigned for a new FPGA due to obsolescence. Gowin makes a 100QFP device that would be a good fit, but my customer has said "no" to the 100% Chinese brand... US government customers, ya know!
> >> >> >
> >> >> >So now I'm looking at a BGA. I don't want to get into fine PCB design rules, so 1.0 mm ball pitch is my preference. The only devices I can find that fit on the board have 196 or 256 pins. But the real problem is availability.
> >> >> >
> >> >> >Digikey has a few of the XC7S15-1FTGB196I and more a scheduled for delivery in April. Add in the various speed and temperature flavors trickling in (mostly in April) and I should be ok for the initial delivery in August... if I can get my hands on those. I don't know if Digikey factors in the backlog orders in these counts.
> >> >> >
> >> >> >Mouser shows great inventory of Efinix parts, particularly the T13 and T20 in a 0.8 mm 256 pin BGA, 10s of thousands in stock. But I'd rather work with a 1.0 mm BGA. Oddly enough, LCSC shows part numbers, but zero inventory.
> >> >> >
> >> >> >Anyone work with 0.8 mm BGAs? What PWB feature dimensions did you use? Did this impact the PWB cost?
> >> >> The 0.8 mm 256-ball T20 isn't bad...
> >> >>
> >> >> https://www.dropbox.com/s/xjqgj2pz9mdhtma/P941_FPGA.jpg?raw=1
> >> >
> >> >I can't really see much detail. It looks like there are virtually no pads on the vias under the BGA. What size are they?
> >> The BGAVIAs are 12.5 mil OD with 8 mil drills. The other vias on the
> >> board STANDARDVIA and POWERVIA are bigger.
> >
> >2.25 mil (0.057 mm) is a pretty narrow via ring. Why not have a larger via pad?
> I don't know. My PCB guy decides stuff like that. I'd guess that he
> wanted it to pass some design rule check, or maybe he started metric.
> The board houses haven't complained as far as I know.
>
> You should do your own thing and check with whoever will make your
> boards.

Sounds good, but I've never been able to get a board house to even discuss these issues. They always take the approach that they will work with what I give them, which means, if it gives poor results, it's my problem.

There are a number of board companies with published capabilities, but they all vary, enough that there seems to be no consensus. Just like your via pad size. I've never seen a board house that says that would be a standard board. I was just looking at one company who wants 10 mil annular ring on inner layers and 7 mil annular ring on surface layers. That's a huge difference from 2.25 mil. On the other hand, they will print 2.5 mil trace/space!

I guess that's why we make prototypes.

--

Rick C.

---- Get 1,000 miles of free Supercharging
---- Tesla referral code - https://ts.la/richard11209

Re: PCB Layout for BGAs

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 by: Richard Damon - Sun, 15 Jan 2023 00:39 UTC

On 1/14/23 7:20 PM, gnuarm.del...@gmail.com wrote:
> On Saturday, January 14, 2023 at 3:17:24 PM UTC-4, John Larkin wrote:

>> You should do your own thing and check with whoever will make your
>> boards.
>
> Sounds good, but I've never been able to get a board house to even discuss these issues. They always take the approach that they will work with what I give them, which means, if it gives poor results, it's my problem.
>
> There are a number of board companies with published capabilities, but they all vary, enough that there seems to be no consensus. Just like your via pad size. I've never seen a board house that says that would be a standard board. I was just looking at one company who wants 10 mil annular ring on inner layers and 7 mil annular ring on surface layers. That's a huge difference from 2.25 mil. On the other hand, they will print 2.5 mil trace/space!
>
> I guess that's why we make prototypes.
>

IF you contact a "Good" board shop, they should be able to give you
their specification to make the board.

They may have several levels (of cost) with different requirements.

If you board shop is NOT giving you a promise that the boards theya have
built will be "successful", then I would not touch them.

Yes, capabilities do vary a lot, so I always like to talk with my CMs
about what shops they use for the sort of class board we are working on,
and check with the shop on their requirements.

We also keep a general idea of capabilities, so if one shop is a bit
better on one spec, we might try not fully using that so other shops are
likely able to handle it.

Re: PCB Layout for BGAs

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 by: John Larkin - Sun, 15 Jan 2023 01:34 UTC

On Sat, 14 Jan 2023 16:20:53 -0800 (PST), "gnuarm.del...@gmail.com"
<gnuarm.deletethisbit@gmail.com> wrote:

>On Saturday, January 14, 2023 at 3:17:24 PM UTC-4, John Larkin wrote:
>> On Sat, 14 Jan 2023 10:05:33 -0800 (PST), "gnuarm.del...@gmail.com"
>> <gnuarm.del...@gmail.com> wrote:
>>
>> >On Saturday, January 14, 2023 at 12:08:03 PM UTC-4, John Larkin wrote:
>> >> On Fri, 13 Jan 2023 21:20:50 -0800 (PST), "gnuarm.del...@gmail.com"
>> >> <gnuarm.del...@gmail.com> wrote:
>> >>
>> >> >On Saturday, January 14, 2023 at 12:39:49 AM UTC-4, John Larkin wrote:
>> >> >> On Sat, 7 Jan 2023 09:49:24 -0800 (PST), "gnuarm.del...@gmail.com"
>> >> >> <gnuarm.del...@gmail.com> wrote:
>> >> >>
>> >> >> >A small board with a 100QFP is being redesigned for a new FPGA due to obsolescence. Gowin makes a 100QFP device that would be a good fit, but my customer has said "no" to the 100% Chinese brand... US government customers, ya know!
>> >> >> >
>> >> >> >So now I'm looking at a BGA. I don't want to get into fine PCB design rules, so 1.0 mm ball pitch is my preference. The only devices I can find that fit on the board have 196 or 256 pins. But the real problem is availability.
>> >> >> >
>> >> >> >Digikey has a few of the XC7S15-1FTGB196I and more a scheduled for delivery in April. Add in the various speed and temperature flavors trickling in (mostly in April) and I should be ok for the initial delivery in August... if I can get my hands on those. I don't know if Digikey factors in the backlog orders in these counts.
>> >> >> >
>> >> >> >Mouser shows great inventory of Efinix parts, particularly the T13 and T20 in a 0.8 mm 256 pin BGA, 10s of thousands in stock. But I'd rather work with a 1.0 mm BGA. Oddly enough, LCSC shows part numbers, but zero inventory.
>> >> >> >
>> >> >> >Anyone work with 0.8 mm BGAs? What PWB feature dimensions did you use? Did this impact the PWB cost?
>> >> >> The 0.8 mm 256-ball T20 isn't bad...
>> >> >>
>> >> >> https://www.dropbox.com/s/xjqgj2pz9mdhtma/P941_FPGA.jpg?raw=1
>> >> >
>> >> >I can't really see much detail. It looks like there are virtually no pads on the vias under the BGA. What size are they?
>> >> The BGAVIAs are 12.5 mil OD with 8 mil drills. The other vias on the
>> >> board STANDARDVIA and POWERVIA are bigger.
>> >
>> >2.25 mil (0.057 mm) is a pretty narrow via ring. Why not have a larger via pad?
>> I don't know. My PCB guy decides stuff like that. I'd guess that he
>> wanted it to pass some design rule check, or maybe he started metric.
>> The board houses haven't complained as far as I know.
>>
>> You should do your own thing and check with whoever will make your
>> boards.
>
>Sounds good, but I've never been able to get a board house to even discuss these issues. They always take the approach that they will work with what I give them, which means, if it gives poor results, it's my problem.

We always specify bare-board testing and warpage and tolerances, so we
don't get bad boards. What we can get is expensive boards.

>
>There are a number of board companies with published capabilities, but they all vary, enough that there seems to be no consensus. Just like your via pad size. I've never seen a board house that says that would be a standard board. I was just looking at one company who wants 10 mil annular ring on inner layers and 7 mil annular ring on surface layers. That's a huge difference from 2.25 mil. On the other hand, they will print 2.5 mil trace/space!

Zero annular ring seems to be OK on inners. That reduces capacitance.
5 or even 4 mil traces are usually standard price. I don't know why my
guy used 6 on the board that I posted.

We do email our board houses and often they answer!

>
>I guess that's why we make prototypes.
We don't prototype actual products; just go for it.

Re: PCB Layout for BGAs

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 by: gnuarm.del...@gmail. - Sun, 15 Jan 2023 01:44 UTC

On Saturday, January 14, 2023 at 8:39:59 PM UTC-4, Richard Damon wrote:
> On 1/14/23 7:20 PM, gnuarm.del...@gmail.com wrote:
> > On Saturday, January 14, 2023 at 3:17:24 PM UTC-4, John Larkin wrote:
>
> >> You should do your own thing and check with whoever will make your
> >> boards.
> >
> > Sounds good, but I've never been able to get a board house to even discuss these issues. They always take the approach that they will work with what I give them, which means, if it gives poor results, it's my problem.
> >
> > There are a number of board companies with published capabilities, but they all vary, enough that there seems to be no consensus. Just like your via pad size. I've never seen a board house that says that would be a standard board. I was just looking at one company who wants 10 mil annular ring on inner layers and 7 mil annular ring on surface layers. That's a huge difference from 2.25 mil. On the other hand, they will print 2.5 mil trace/space!
> >
> > I guess that's why we make prototypes.
> >
> IF you contact a "Good" board shop, they should be able to give you
> their specification to make the board.

Ok, which are the "good" ones? I assume you mean a place that makes the bare boards. A CM typically buys bare boards and assembles the parts. Like I said, they work with what you give them and will do their best. They expect the designers to do the design work.

> They may have several levels (of cost) with different requirements.
>
>
> If you board shop is NOT giving you a promise that the boards theya have
> built will be "successful", then I would not touch them.

They don't charge for boards that don't work, of course. But the parts that get thrown out are mine. I was a bit surprised to find out they actually expect to see 20% fall out because of parts not properly picked up. They get pulled off the tape, but if they are not aligned well enough, they get flung into space. One of the parts on my previous build had a $200 part on it. We lost some 40 or so, I don't recall the exact number. They recovered a few of them from various nooks and crannies. I've always been told about losses, but I thought that was mostly the tiny passives that don't matter. This was a pretty small, TSSOP-20.

> Yes, capabilities do vary a lot, so I always like to talk with my CMs
> about what shops they use for the sort of class board we are working on,
> and check with the shop on their requirements.
>
> We also keep a general idea of capabilities, so if one shop is a bit
> better on one spec, we might try not fully using that so other shops are
> likely able to handle it.

I got the "Award Letter" the other day and with the onerous conditions, I may not be able to accept the order. Two years ago, we went through this via a third party CM who did their integration. It took months to resolve the issues. They want prototypes in May. Ain't gonna happen.

They want me to guarantee all manner of things that I can't guarantee, such as being able to manufacture the boards for 10 years. They want indemnifications for all manner of things. They even claim ownership of any "unpatented knowledge or information" that is disclosed to them is considered to be "part of the consideration for this Agreement". I believe this is what is called "trade secrets".

This is far more onerous than what had been negotiated previously though their CM. Now, I have to start all over again.

--

Rick C.

---+ Get 1,000 miles of free Supercharging
---+ Tesla referral code - https://ts.la/richard11209

Re: PCB Layout for BGAs

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 by: gnuarm.del...@gmail. - Sun, 15 Jan 2023 01:52 UTC

On Saturday, January 14, 2023 at 9:34:09 PM UTC-4, John Larkin wrote:
> On Sat, 14 Jan 2023 16:20:53 -0800 (PST), "gnuarm.del...@gmail.com"
> <gnuarm.del...@gmail.com> wrote:
>
> >On Saturday, January 14, 2023 at 3:17:24 PM UTC-4, John Larkin wrote:
> >> On Sat, 14 Jan 2023 10:05:33 -0800 (PST), "gnuarm.del...@gmail.com"
> >> <gnuarm.del...@gmail.com> wrote:
> >>
> >> >On Saturday, January 14, 2023 at 12:08:03 PM UTC-4, John Larkin wrote:
> >> >> On Fri, 13 Jan 2023 21:20:50 -0800 (PST), "gnuarm.del...@gmail.com"
> >> >> <gnuarm.del...@gmail.com> wrote:
> >> >>
> >> >> >On Saturday, January 14, 2023 at 12:39:49 AM UTC-4, John Larkin wrote:
> >> >> >> On Sat, 7 Jan 2023 09:49:24 -0800 (PST), "gnuarm.del...@gmail.com"
> >> >> >> <gnuarm.del...@gmail.com> wrote:
> >> >> >>
> >> >> >> >A small board with a 100QFP is being redesigned for a new FPGA due to obsolescence. Gowin makes a 100QFP device that would be a good fit, but my customer has said "no" to the 100% Chinese brand... US government customers, ya know!
> >> >> >> >
> >> >> >> >So now I'm looking at a BGA. I don't want to get into fine PCB design rules, so 1.0 mm ball pitch is my preference. The only devices I can find that fit on the board have 196 or 256 pins. But the real problem is availability.
> >> >> >> >
> >> >> >> >Digikey has a few of the XC7S15-1FTGB196I and more a scheduled for delivery in April. Add in the various speed and temperature flavors trickling in (mostly in April) and I should be ok for the initial delivery in August... if I can get my hands on those. I don't know if Digikey factors in the backlog orders in these counts.
> >> >> >> >
> >> >> >> >Mouser shows great inventory of Efinix parts, particularly the T13 and T20 in a 0.8 mm 256 pin BGA, 10s of thousands in stock. But I'd rather work with a 1.0 mm BGA. Oddly enough, LCSC shows part numbers, but zero inventory.
> >> >> >> >
> >> >> >> >Anyone work with 0.8 mm BGAs? What PWB feature dimensions did you use? Did this impact the PWB cost?
> >> >> >> The 0.8 mm 256-ball T20 isn't bad...
> >> >> >>
> >> >> >> https://www.dropbox.com/s/xjqgj2pz9mdhtma/P941_FPGA.jpg?raw=1
> >> >> >
> >> >> >I can't really see much detail. It looks like there are virtually no pads on the vias under the BGA. What size are they?
> >> >> The BGAVIAs are 12.5 mil OD with 8 mil drills. The other vias on the
> >> >> board STANDARDVIA and POWERVIA are bigger.
> >> >
> >> >2.25 mil (0.057 mm) is a pretty narrow via ring. Why not have a larger via pad?
> >> I don't know. My PCB guy decides stuff like that. I'd guess that he
> >> wanted it to pass some design rule check, or maybe he started metric.
> >> The board houses haven't complained as far as I know.
> >>
> >> You should do your own thing and check with whoever will make your
> >> boards.
> >
> >Sounds good, but I've never been able to get a board house to even discuss these issues. They always take the approach that they will work with what I give them, which means, if it gives poor results, it's my problem.
> We always specify bare-board testing and warpage and tolerances, so we
> don't get bad boards. What we can get is expensive boards.
> >
> >There are a number of board companies with published capabilities, but they all vary, enough that there seems to be no consensus. Just like your via pad size. I've never seen a board house that says that would be a standard board. I was just looking at one company who wants 10 mil annular ring on inner layers and 7 mil annular ring on surface layers. That's a huge difference from 2.25 mil. On the other hand, they will print 2.5 mil trace/space!
> Zero annular ring seems to be OK on inners. That reduces capacitance.
> 5 or even 4 mil traces are usually standard price. I don't know why my
> guy used 6 on the board that I posted.
>
> We do email our board houses and often they answer!

You aren't paying attention. I don't use a PWB fabricator, I use a Contract Assembly house to assemble my boards. They are a middle man between me and the PWB fabricator. Once, no twice I've had to get on the phone with the actual PWB fabricator to convince him that he should not clip my silk screen. The use such a large clip radius that they made half the refdes illegible. That really makes the board hard to debug.

> >I guess that's why we make prototypes.
> We don't prototype actual products; just go for it.

I don't have a choice, the customer wants 16 early protos, then 146 protos, then 100 pieces for pilot and 1100 FRS. So there is no "go for it". I'm sure I'll munge something up. Replacing the two main parts on the board and moving the connectors to the other side, means it's a complete redesign, at least for the artwork, if not the schematic.

--

Rick C.

--+- Get 1,000 miles of free Supercharging
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Re: PCB Layout for BGAs

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 by: Richard Damon - Sun, 15 Jan 2023 02:31 UTC

On 1/14/23 8:44 PM, gnuarm.del...@gmail.com wrote:
> On Saturday, January 14, 2023 at 8:39:59 PM UTC-4, Richard Damon wrote:
>> On 1/14/23 7:20 PM, gnuarm.del...@gmail.com wrote:
>>> On Saturday, January 14, 2023 at 3:17:24 PM UTC-4, John Larkin wrote:
>>
>>>> You should do your own thing and check with whoever will make your
>>>> boards.
>>>
>>> Sounds good, but I've never been able to get a board house to even discuss these issues. They always take the approach that they will work with what I give them, which means, if it gives poor results, it's my problem.
>>>
>>> There are a number of board companies with published capabilities, but they all vary, enough that there seems to be no consensus. Just like your via pad size. I've never seen a board house that says that would be a standard board. I was just looking at one company who wants 10 mil annular ring on inner layers and 7 mil annular ring on surface layers. That's a huge difference from 2.25 mil. On the other hand, they will print 2.5 mil trace/space!
>>>
>>> I guess that's why we make prototypes.
>>>
>> IF you contact a "Good" board shop, they should be able to give you
>> their specification to make the board.
>
> Ok, which are the "good" ones? I assume you mean a place that makes the bare boards. A CM typically buys bare boards and assembles the parts. Like I said, they work with what you give them and will do their best. They expect the designers to do the design work.
>
>

There are a number of them, As I said, If you are using a CM, you will
need to talk with them and find who they use and talk to them about
their requirements.

>> They may have several levels (of cost) with different requirements.
>>
>>
>> If you board shop is NOT giving you a promise that the boards theya have
>> built will be "successful", then I would not touch them.
>
> They don't charge for boards that don't work, of course. But the parts that get thrown out are mine. I was a bit surprised to find out they actually expect to see 20% fall out because of parts not properly picked up. They get pulled off the tape, but if they are not aligned well enough, they get flung into space. One of the parts on my previous build had a $200 part on it. We lost some 40 or so, I don't recall the exact number. They recovered a few of them from various nooks and crannies. I've always been told about losses, but I thought that was mostly the tiny passives that don't matter. This was a pretty small, TSSOP-20.

So, you aren't using a good CM, as they aren't using a good board shop,
or at least didn't give you their expected failure rates up front. Yes,
there are loss factors for parts, but if they didn't give you those when
you started to negotiate the contract when you indicated you will be
supplying some of the parts, they aren't doing their job.

Yes, it may be "cheaper" to use a shop like that, but you pay for it in
those sorts of costs.

>
>
>> Yes, capabilities do vary a lot, so I always like to talk with my CMs
>> about what shops they use for the sort of class board we are working on,
>> and check with the shop on their requirements.
>>
>> We also keep a general idea of capabilities, so if one shop is a bit
>> better on one spec, we might try not fully using that so other shops are
>> likely able to handle it.
>
> I got the "Award Letter" the other day and with the onerous conditions, I may not be able to accept the order. Two years ago, we went through this via a third party CM who did their integration. It took months to resolve the issues. They want prototypes in May. Ain't gonna happen.
>
> They want me to guarantee all manner of things that I can't guarantee, such as being able to manufacture the boards for 10 years. They want indemnifications for all manner of things. They even claim ownership of any "unpatented knowledge or information" that is disclosed to them is considered to be "part of the consideration for this Agreement". I believe this is what is called "trade secrets".
>
> This is far more onerous than what had been negotiated previously though their CM. Now, I have to start all over again.
>

Yes, some "customers" are not worth it.

Re: PCB Layout for BGAs

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 by: John Larkin - Sun, 15 Jan 2023 04:10 UTC

On Sat, 14 Jan 2023 17:52:45 -0800 (PST), "gnuarm.del...@gmail.com"
<gnuarm.deletethisbit@gmail.com> wrote:

>On Saturday, January 14, 2023 at 9:34:09 PM UTC-4, John Larkin wrote:
>> On Sat, 14 Jan 2023 16:20:53 -0800 (PST), "gnuarm.del...@gmail.com"
>> <gnuarm.del...@gmail.com> wrote:
>>
>> >On Saturday, January 14, 2023 at 3:17:24 PM UTC-4, John Larkin wrote:
>> >> On Sat, 14 Jan 2023 10:05:33 -0800 (PST), "gnuarm.del...@gmail.com"
>> >> <gnuarm.del...@gmail.com> wrote:
>> >>
>> >> >On Saturday, January 14, 2023 at 12:08:03 PM UTC-4, John Larkin wrote:
>> >> >> On Fri, 13 Jan 2023 21:20:50 -0800 (PST), "gnuarm.del...@gmail.com"
>> >> >> <gnuarm.del...@gmail.com> wrote:
>> >> >>
>> >> >> >On Saturday, January 14, 2023 at 12:39:49 AM UTC-4, John Larkin wrote:
>> >> >> >> On Sat, 7 Jan 2023 09:49:24 -0800 (PST), "gnuarm.del...@gmail.com"
>> >> >> >> <gnuarm.del...@gmail.com> wrote:
>> >> >> >>
>> >> >> >> >A small board with a 100QFP is being redesigned for a new FPGA due to obsolescence. Gowin makes a 100QFP device that would be a good fit, but my customer has said "no" to the 100% Chinese brand... US government customers, ya know!
>> >> >> >> >
>> >> >> >> >So now I'm looking at a BGA. I don't want to get into fine PCB design rules, so 1.0 mm ball pitch is my preference. The only devices I can find that fit on the board have 196 or 256 pins. But the real problem is availability.
>> >> >> >> >
>> >> >> >> >Digikey has a few of the XC7S15-1FTGB196I and more a scheduled for delivery in April. Add in the various speed and temperature flavors trickling in (mostly in April) and I should be ok for the initial delivery in August... if I can get my hands on those. I don't know if Digikey factors in the backlog orders in these counts.
>> >> >> >> >
>> >> >> >> >Mouser shows great inventory of Efinix parts, particularly the T13 and T20 in a 0.8 mm 256 pin BGA, 10s of thousands in stock. But I'd rather work with a 1.0 mm BGA. Oddly enough, LCSC shows part numbers, but zero inventory.
>> >> >> >> >
>> >> >> >> >Anyone work with 0.8 mm BGAs? What PWB feature dimensions did you use? Did this impact the PWB cost?
>> >> >> >> The 0.8 mm 256-ball T20 isn't bad...
>> >> >> >>
>> >> >> >> https://www.dropbox.com/s/xjqgj2pz9mdhtma/P941_FPGA.jpg?raw=1
>> >> >> >
>> >> >> >I can't really see much detail. It looks like there are virtually no pads on the vias under the BGA. What size are they?
>> >> >> The BGAVIAs are 12.5 mil OD with 8 mil drills. The other vias on the
>> >> >> board STANDARDVIA and POWERVIA are bigger.
>> >> >
>> >> >2.25 mil (0.057 mm) is a pretty narrow via ring. Why not have a larger via pad?
>> >> I don't know. My PCB guy decides stuff like that. I'd guess that he
>> >> wanted it to pass some design rule check, or maybe he started metric.
>> >> The board houses haven't complained as far as I know.
>> >>
>> >> You should do your own thing and check with whoever will make your
>> >> boards.
>> >
>> >Sounds good, but I've never been able to get a board house to even discuss these issues. They always take the approach that they will work with what I give them, which means, if it gives poor results, it's my problem.
>> We always specify bare-board testing and warpage and tolerances, so we
>> don't get bad boards. What we can get is expensive boards.
>> >
>> >There are a number of board companies with published capabilities, but they all vary, enough that there seems to be no consensus. Just like your via pad size. I've never seen a board house that says that would be a standard board. I was just looking at one company who wants 10 mil annular ring on inner layers and 7 mil annular ring on surface layers. That's a huge difference from 2.25 mil. On the other hand, they will print 2.5 mil trace/space!
>> Zero annular ring seems to be OK on inners. That reduces capacitance.
>> 5 or even 4 mil traces are usually standard price. I don't know why my
>> guy used 6 on the board that I posted.
>>
>> We do email our board houses and often they answer!
>
>You aren't paying attention.

That's because you're obnoxious.

Re: PCB Layout for BGAs

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 by: gnuarm.del...@gmail. - Sun, 15 Jan 2023 05:04 UTC

On Sunday, January 15, 2023 at 12:10:54 AM UTC-4, John Larkin wrote:
> On Sat, 14 Jan 2023 17:52:45 -0800 (PST), "gnuarm.del...@gmail.com"
> <gnuarm.del...@gmail.com> wrote:
>
> >On Saturday, January 14, 2023 at 9:34:09 PM UTC-4, John Larkin wrote:
> >> On Sat, 14 Jan 2023 16:20:53 -0800 (PST), "gnuarm.del...@gmail.com"
> >> <gnuarm.del...@gmail.com> wrote:
> >>
> >> >On Saturday, January 14, 2023 at 3:17:24 PM UTC-4, John Larkin wrote:
> >> >> On Sat, 14 Jan 2023 10:05:33 -0800 (PST), "gnuarm.del...@gmail.com"
> >> >> <gnuarm.del...@gmail.com> wrote:
> >> >>
> >> >> >On Saturday, January 14, 2023 at 12:08:03 PM UTC-4, John Larkin wrote:
> >> >> >> On Fri, 13 Jan 2023 21:20:50 -0800 (PST), "gnuarm.del...@gmail.com"
> >> >> >> <gnuarm.del...@gmail.com> wrote:
> >> >> >>
> >> >> >> >On Saturday, January 14, 2023 at 12:39:49 AM UTC-4, John Larkin wrote:
> >> >> >> >> On Sat, 7 Jan 2023 09:49:24 -0800 (PST), "gnuarm.del...@gmail..com"
> >> >> >> >> <gnuarm.del...@gmail.com> wrote:
> >> >> >> >>
> >> >> >> >> >A small board with a 100QFP is being redesigned for a new FPGA due to obsolescence. Gowin makes a 100QFP device that would be a good fit, but my customer has said "no" to the 100% Chinese brand... US government customers, ya know!
> >> >> >> >> >
> >> >> >> >> >So now I'm looking at a BGA. I don't want to get into fine PCB design rules, so 1.0 mm ball pitch is my preference. The only devices I can find that fit on the board have 196 or 256 pins. But the real problem is availability.
> >> >> >> >> >
> >> >> >> >> >Digikey has a few of the XC7S15-1FTGB196I and more a scheduled for delivery in April. Add in the various speed and temperature flavors trickling in (mostly in April) and I should be ok for the initial delivery in August... if I can get my hands on those. I don't know if Digikey factors in the backlog orders in these counts.
> >> >> >> >> >
> >> >> >> >> >Mouser shows great inventory of Efinix parts, particularly the T13 and T20 in a 0.8 mm 256 pin BGA, 10s of thousands in stock. But I'd rather work with a 1.0 mm BGA. Oddly enough, LCSC shows part numbers, but zero inventory.
> >> >> >> >> >
> >> >> >> >> >Anyone work with 0.8 mm BGAs? What PWB feature dimensions did you use? Did this impact the PWB cost?
> >> >> >> >> The 0.8 mm 256-ball T20 isn't bad...
> >> >> >> >>
> >> >> >> >> https://www.dropbox.com/s/xjqgj2pz9mdhtma/P941_FPGA.jpg?raw=1
> >> >> >> >
> >> >> >> >I can't really see much detail. It looks like there are virtually no pads on the vias under the BGA. What size are they?
> >> >> >> The BGAVIAs are 12.5 mil OD with 8 mil drills. The other vias on the
> >> >> >> board STANDARDVIA and POWERVIA are bigger.
> >> >> >
> >> >> >2.25 mil (0.057 mm) is a pretty narrow via ring. Why not have a larger via pad?
> >> >> I don't know. My PCB guy decides stuff like that. I'd guess that he
> >> >> wanted it to pass some design rule check, or maybe he started metric.
> >> >> The board houses haven't complained as far as I know.
> >> >>
> >> >> You should do your own thing and check with whoever will make your
> >> >> boards.
> >> >
> >> >Sounds good, but I've never been able to get a board house to even discuss these issues. They always take the approach that they will work with what I give them, which means, if it gives poor results, it's my problem.
> >> We always specify bare-board testing and warpage and tolerances, so we
> >> don't get bad boards. What we can get is expensive boards.
> >> >
> >> >There are a number of board companies with published capabilities, but they all vary, enough that there seems to be no consensus. Just like your via pad size. I've never seen a board house that says that would be a standard board. I was just looking at one company who wants 10 mil annular ring on inner layers and 7 mil annular ring on surface layers. That's a huge difference from 2.25 mil. On the other hand, they will print 2.5 mil trace/space!
> >> Zero annular ring seems to be OK on inners. That reduces capacitance.
> >> 5 or even 4 mil traces are usually standard price. I don't know why my
> >> guy used 6 on the board that I posted.
> >>
> >> We do email our board houses and often they answer!
> >
> >You aren't paying attention.
> That's because you're obnoxious.

Wow! Talk about sensitive. What is going on with you???

--

Rick C.

--++ Get 1,000 miles of free Supercharging
--++ Tesla referral code - https://ts.la/richard11209

Re: PCB Layout for BGAs

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 by: John Larkin - Sun, 15 Jan 2023 18:36 UTC

On Sat, 14 Jan 2023 21:04:55 -0800 (PST), "gnuarm.del...@gmail.com"
<gnuarm.deletethisbit@gmail.com> wrote:

>On Sunday, January 15, 2023 at 12:10:54 AM UTC-4, John Larkin wrote:
>> On Sat, 14 Jan 2023 17:52:45 -0800 (PST), "gnuarm.del...@gmail.com"
>> <gnuarm.del...@gmail.com> wrote:
>>
>> >On Saturday, January 14, 2023 at 9:34:09 PM UTC-4, John Larkin wrote:
>> >> On Sat, 14 Jan 2023 16:20:53 -0800 (PST), "gnuarm.del...@gmail.com"
>> >> <gnuarm.del...@gmail.com> wrote:
>> >>
>> >> >On Saturday, January 14, 2023 at 3:17:24 PM UTC-4, John Larkin wrote:
>> >> >> On Sat, 14 Jan 2023 10:05:33 -0800 (PST), "gnuarm.del...@gmail.com"
>> >> >> <gnuarm.del...@gmail.com> wrote:
>> >> >>
>> >> >> >On Saturday, January 14, 2023 at 12:08:03 PM UTC-4, John Larkin wrote:
>> >> >> >> On Fri, 13 Jan 2023 21:20:50 -0800 (PST), "gnuarm.del...@gmail.com"
>> >> >> >> <gnuarm.del...@gmail.com> wrote:
>> >> >> >>
>> >> >> >> >On Saturday, January 14, 2023 at 12:39:49 AM UTC-4, John Larkin wrote:
>> >> >> >> >> On Sat, 7 Jan 2023 09:49:24 -0800 (PST), "gnuarm.del...@gmail.com"
>> >> >> >> >> <gnuarm.del...@gmail.com> wrote:
>> >> >> >> >>
>> >> >> >> >> >A small board with a 100QFP is being redesigned for a new FPGA due to obsolescence. Gowin makes a 100QFP device that would be a good fit, but my customer has said "no" to the 100% Chinese brand... US government customers, ya know!
>> >> >> >> >> >
>> >> >> >> >> >So now I'm looking at a BGA. I don't want to get into fine PCB design rules, so 1.0 mm ball pitch is my preference. The only devices I can find that fit on the board have 196 or 256 pins. But the real problem is availability.
>> >> >> >> >> >
>> >> >> >> >> >Digikey has a few of the XC7S15-1FTGB196I and more a scheduled for delivery in April. Add in the various speed and temperature flavors trickling in (mostly in April) and I should be ok for the initial delivery in August... if I can get my hands on those. I don't know if Digikey factors in the backlog orders in these counts.
>> >> >> >> >> >
>> >> >> >> >> >Mouser shows great inventory of Efinix parts, particularly the T13 and T20 in a 0.8 mm 256 pin BGA, 10s of thousands in stock. But I'd rather work with a 1.0 mm BGA. Oddly enough, LCSC shows part numbers, but zero inventory.
>> >> >> >> >> >
>> >> >> >> >> >Anyone work with 0.8 mm BGAs? What PWB feature dimensions did you use? Did this impact the PWB cost?
>> >> >> >> >> The 0.8 mm 256-ball T20 isn't bad...
>> >> >> >> >>
>> >> >> >> >> https://www.dropbox.com/s/xjqgj2pz9mdhtma/P941_FPGA.jpg?raw=1
>> >> >> >> >
>> >> >> >> >I can't really see much detail. It looks like there are virtually no pads on the vias under the BGA. What size are they?
>> >> >> >> The BGAVIAs are 12.5 mil OD with 8 mil drills. The other vias on the
>> >> >> >> board STANDARDVIA and POWERVIA are bigger.
>> >> >> >
>> >> >> >2.25 mil (0.057 mm) is a pretty narrow via ring. Why not have a larger via pad?
>> >> >> I don't know. My PCB guy decides stuff like that. I'd guess that he
>> >> >> wanted it to pass some design rule check, or maybe he started metric.
>> >> >> The board houses haven't complained as far as I know.
>> >> >>
>> >> >> You should do your own thing and check with whoever will make your
>> >> >> boards.
>> >> >
>> >> >Sounds good, but I've never been able to get a board house to even discuss these issues. They always take the approach that they will work with what I give them, which means, if it gives poor results, it's my problem.
>> >> We always specify bare-board testing and warpage and tolerances, so we
>> >> don't get bad boards. What we can get is expensive boards.
>> >> >
>> >> >There are a number of board companies with published capabilities, but they all vary, enough that there seems to be no consensus. Just like your via pad size. I've never seen a board house that says that would be a standard board. I was just looking at one company who wants 10 mil annular ring on inner layers and 7 mil annular ring on surface layers. That's a huge difference from 2.25 mil. On the other hand, they will print 2.5 mil trace/space!
>> >> Zero annular ring seems to be OK on inners. That reduces capacitance.
>> >> 5 or even 4 mil traces are usually standard price. I don't know why my
>> >> guy used 6 on the board that I posted.
>> >>
>> >> We do email our board houses and often they answer!
>> >
>> >You aren't paying attention.
>> That's because you're obnoxious.
>
>Wow! Talk about sensitive. What is going on with you???

Just trying to help. My mistake.

Re: PCB Layout for BGAs

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From: gnuarm.d...@gmail.com (gnuarm.del...@gmail.com)
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 by: gnuarm.del...@gmail. - Mon, 16 Jan 2023 04:11 UTC

On Sunday, January 15, 2023 at 2:37:04 PM UTC-4, John Larkin wrote:
> On Sat, 14 Jan 2023 21:04:55 -0800 (PST), "gnuarm.del...@gmail.com"
> <gnuarm.del...@gmail.com> wrote:
>
> >On Sunday, January 15, 2023 at 12:10:54 AM UTC-4, John Larkin wrote:
> >> On Sat, 14 Jan 2023 17:52:45 -0800 (PST), "gnuarm.del...@gmail.com"
> >> <gnuarm.del...@gmail.com> wrote:
> >>
> >> >On Saturday, January 14, 2023 at 9:34:09 PM UTC-4, John Larkin wrote:
> >> >> On Sat, 14 Jan 2023 16:20:53 -0800 (PST), "gnuarm.del...@gmail.com"
> >> >> <gnuarm.del...@gmail.com> wrote:
> >> >>
> >> >> >On Saturday, January 14, 2023 at 3:17:24 PM UTC-4, John Larkin wrote:
> >> >> >> On Sat, 14 Jan 2023 10:05:33 -0800 (PST), "gnuarm.del...@gmail.com"
> >> >> >> <gnuarm.del...@gmail.com> wrote:
> >> >> >>
> >> >> >> >On Saturday, January 14, 2023 at 12:08:03 PM UTC-4, John Larkin wrote:
> >> >> >> >> On Fri, 13 Jan 2023 21:20:50 -0800 (PST), "gnuarm.del...@gmail.com"
> >> >> >> >> <gnuarm.del...@gmail.com> wrote:
> >> >> >> >>
> >> >> >> >> >On Saturday, January 14, 2023 at 12:39:49 AM UTC-4, John Larkin wrote:
> >> >> >> >> >> On Sat, 7 Jan 2023 09:49:24 -0800 (PST), "gnuarm.del...@gmail.com"
> >> >> >> >> >> <gnuarm.del...@gmail.com> wrote:
> >> >> >> >> >>
> >> >> >> >> >> >A small board with a 100QFP is being redesigned for a new FPGA due to obsolescence. Gowin makes a 100QFP device that would be a good fit, but my customer has said "no" to the 100% Chinese brand... US government customers, ya know!
> >> >> >> >> >> >
> >> >> >> >> >> >So now I'm looking at a BGA. I don't want to get into fine PCB design rules, so 1.0 mm ball pitch is my preference. The only devices I can find that fit on the board have 196 or 256 pins. But the real problem is availability.
> >> >> >> >> >> >
> >> >> >> >> >> >Digikey has a few of the XC7S15-1FTGB196I and more a scheduled for delivery in April. Add in the various speed and temperature flavors trickling in (mostly in April) and I should be ok for the initial delivery in August... if I can get my hands on those. I don't know if Digikey factors in the backlog orders in these counts.
> >> >> >> >> >> >
> >> >> >> >> >> >Mouser shows great inventory of Efinix parts, particularly the T13 and T20 in a 0.8 mm 256 pin BGA, 10s of thousands in stock. But I'd rather work with a 1.0 mm BGA. Oddly enough, LCSC shows part numbers, but zero inventory.
> >> >> >> >> >> >
> >> >> >> >> >> >Anyone work with 0.8 mm BGAs? What PWB feature dimensions did you use? Did this impact the PWB cost?
> >> >> >> >> >> The 0.8 mm 256-ball T20 isn't bad...
> >> >> >> >> >>
> >> >> >> >> >> https://www.dropbox.com/s/xjqgj2pz9mdhtma/P941_FPGA.jpg?raw=1
> >> >> >> >> >
> >> >> >> >> >I can't really see much detail. It looks like there are virtually no pads on the vias under the BGA. What size are they?
> >> >> >> >> The BGAVIAs are 12.5 mil OD with 8 mil drills. The other vias on the
> >> >> >> >> board STANDARDVIA and POWERVIA are bigger.
> >> >> >> >
> >> >> >> >2.25 mil (0.057 mm) is a pretty narrow via ring. Why not have a larger via pad?
> >> >> >> I don't know. My PCB guy decides stuff like that. I'd guess that he
> >> >> >> wanted it to pass some design rule check, or maybe he started metric.
> >> >> >> The board houses haven't complained as far as I know.
> >> >> >>
> >> >> >> You should do your own thing and check with whoever will make your
> >> >> >> boards.
> >> >> >
> >> >> >Sounds good, but I've never been able to get a board house to even discuss these issues. They always take the approach that they will work with what I give them, which means, if it gives poor results, it's my problem..
> >> >> We always specify bare-board testing and warpage and tolerances, so we
> >> >> don't get bad boards. What we can get is expensive boards.
> >> >> >
> >> >> >There are a number of board companies with published capabilities, but they all vary, enough that there seems to be no consensus. Just like your via pad size. I've never seen a board house that says that would be a standard board. I was just looking at one company who wants 10 mil annular ring on inner layers and 7 mil annular ring on surface layers. That's a huge difference from 2.25 mil. On the other hand, they will print 2.5 mil trace/space!
> >> >> Zero annular ring seems to be OK on inners. That reduces capacitance.
> >> >> 5 or even 4 mil traces are usually standard price. I don't know why my
> >> >> guy used 6 on the board that I posted.
> >> >>
> >> >> We do email our board houses and often they answer!
> >> >
> >> >You aren't paying attention.
> >> That's because you're obnoxious.
> >
> >Wow! Talk about sensitive. What is going on with you???
> Just trying to help. My mistake.

Dude, you are way too sensitive. Chillax! You'll live longer.

--

Rick C.

-+-- Get 1,000 miles of free Supercharging
-+-- Tesla referral code - https://ts.la/richard11209

Re: PCB Layout for BGAs

<3qpashhu8vt3f66q1m2vdkdrunrojik1ld@4ax.com>

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 by: John Larkin - Mon, 16 Jan 2023 15:04 UTC

On Sun, 15 Jan 2023 20:11:34 -0800 (PST), "gnuarm.del...@gmail.com"
<gnuarm.deletethisbit@gmail.com> wrote:

>On Sunday, January 15, 2023 at 2:37:04 PM UTC-4, John Larkin wrote:
>> On Sat, 14 Jan 2023 21:04:55 -0800 (PST), "gnuarm.del...@gmail.com"
>> <gnuarm.del...@gmail.com> wrote:
>>
>> >On Sunday, January 15, 2023 at 12:10:54 AM UTC-4, John Larkin wrote:
>> >> On Sat, 14 Jan 2023 17:52:45 -0800 (PST), "gnuarm.del...@gmail.com"
>> >> <gnuarm.del...@gmail.com> wrote:
>> >>
>> >> >On Saturday, January 14, 2023 at 9:34:09 PM UTC-4, John Larkin wrote:
>> >> >> On Sat, 14 Jan 2023 16:20:53 -0800 (PST), "gnuarm.del...@gmail.com"
>> >> >> <gnuarm.del...@gmail.com> wrote:
>> >> >>
>> >> >> >On Saturday, January 14, 2023 at 3:17:24 PM UTC-4, John Larkin wrote:
>> >> >> >> On Sat, 14 Jan 2023 10:05:33 -0800 (PST), "gnuarm.del...@gmail.com"
>> >> >> >> <gnuarm.del...@gmail.com> wrote:
>> >> >> >>
>> >> >> >> >On Saturday, January 14, 2023 at 12:08:03 PM UTC-4, John Larkin wrote:
>> >> >> >> >> On Fri, 13 Jan 2023 21:20:50 -0800 (PST), "gnuarm.del...@gmail.com"
>> >> >> >> >> <gnuarm.del...@gmail.com> wrote:
>> >> >> >> >>
>> >> >> >> >> >On Saturday, January 14, 2023 at 12:39:49 AM UTC-4, John Larkin wrote:
>> >> >> >> >> >> On Sat, 7 Jan 2023 09:49:24 -0800 (PST), "gnuarm.del...@gmail.com"
>> >> >> >> >> >> <gnuarm.del...@gmail.com> wrote:
>> >> >> >> >> >>
>> >> >> >> >> >> >A small board with a 100QFP is being redesigned for a new FPGA due to obsolescence. Gowin makes a 100QFP device that would be a good fit, but my customer has said "no" to the 100% Chinese brand... US government customers, ya know!
>> >> >> >> >> >> >
>> >> >> >> >> >> >So now I'm looking at a BGA. I don't want to get into fine PCB design rules, so 1.0 mm ball pitch is my preference. The only devices I can find that fit on the board have 196 or 256 pins. But the real problem is availability.
>> >> >> >> >> >> >
>> >> >> >> >> >> >Digikey has a few of the XC7S15-1FTGB196I and more a scheduled for delivery in April. Add in the various speed and temperature flavors trickling in (mostly in April) and I should be ok for the initial delivery in August... if I can get my hands on those. I don't know if Digikey factors in the backlog orders in these counts.
>> >> >> >> >> >> >
>> >> >> >> >> >> >Mouser shows great inventory of Efinix parts, particularly the T13 and T20 in a 0.8 mm 256 pin BGA, 10s of thousands in stock. But I'd rather work with a 1.0 mm BGA. Oddly enough, LCSC shows part numbers, but zero inventory.
>> >> >> >> >> >> >
>> >> >> >> >> >> >Anyone work with 0.8 mm BGAs? What PWB feature dimensions did you use? Did this impact the PWB cost?
>> >> >> >> >> >> The 0.8 mm 256-ball T20 isn't bad...
>> >> >> >> >> >>
>> >> >> >> >> >> https://www.dropbox.com/s/xjqgj2pz9mdhtma/P941_FPGA.jpg?raw=1
>> >> >> >> >> >
>> >> >> >> >> >I can't really see much detail. It looks like there are virtually no pads on the vias under the BGA. What size are they?
>> >> >> >> >> The BGAVIAs are 12.5 mil OD with 8 mil drills. The other vias on the
>> >> >> >> >> board STANDARDVIA and POWERVIA are bigger.
>> >> >> >> >
>> >> >> >> >2.25 mil (0.057 mm) is a pretty narrow via ring. Why not have a larger via pad?
>> >> >> >> I don't know. My PCB guy decides stuff like that. I'd guess that he
>> >> >> >> wanted it to pass some design rule check, or maybe he started metric.
>> >> >> >> The board houses haven't complained as far as I know.
>> >> >> >>
>> >> >> >> You should do your own thing and check with whoever will make your
>> >> >> >> boards.
>> >> >> >
>> >> >> >Sounds good, but I've never been able to get a board house to even discuss these issues. They always take the approach that they will work with what I give them, which means, if it gives poor results, it's my problem.
>> >> >> We always specify bare-board testing and warpage and tolerances, so we
>> >> >> don't get bad boards. What we can get is expensive boards.
>> >> >> >
>> >> >> >There are a number of board companies with published capabilities, but they all vary, enough that there seems to be no consensus. Just like your via pad size. I've never seen a board house that says that would be a standard board. I was just looking at one company who wants 10 mil annular ring on inner layers and 7 mil annular ring on surface layers. That's a huge difference from 2.25 mil. On the other hand, they will print 2.5 mil trace/space!
>> >> >> Zero annular ring seems to be OK on inners. That reduces capacitance.
>> >> >> 5 or even 4 mil traces are usually standard price. I don't know why my
>> >> >> guy used 6 on the board that I posted.
>> >> >>
>> >> >> We do email our board houses and often they answer!
>> >> >
>> >> >You aren't paying attention.
>> >> That's because you're obnoxious.
>> >
>> >Wow! Talk about sensitive. What is going on with you???
>> Just trying to help. My mistake.
>
>Dude, you are way too sensitive. Chillax! You'll live longer.

Stop being obnoxious and you'll get more help.

But not fom me.

Re: PCB Layout for BGAs

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Subject: Re: PCB Layout for BGAs
From: gnuarm.d...@gmail.com (gnuarm.del...@gmail.com)
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 by: gnuarm.del...@gmail. - Mon, 16 Jan 2023 15:29 UTC

On Monday, January 16, 2023 at 11:04:28 AM UTC-4, John Larkin wrote:
> On Sun, 15 Jan 2023 20:11:34 -0800 (PST), "gnuarm.del...@gmail.com"
> <gnuarm.del...@gmail.com> wrote:
>
> >On Sunday, January 15, 2023 at 2:37:04 PM UTC-4, John Larkin wrote:
> >> On Sat, 14 Jan 2023 21:04:55 -0800 (PST), "gnuarm.del...@gmail.com"
> >> <gnuarm.del...@gmail.com> wrote:
> >>
> >> >On Sunday, January 15, 2023 at 12:10:54 AM UTC-4, John Larkin wrote:
> >> >> On Sat, 14 Jan 2023 17:52:45 -0800 (PST), "gnuarm.del...@gmail.com"
> >> >> <gnuarm.del...@gmail.com> wrote:
> >> >>
> >> >> >On Saturday, January 14, 2023 at 9:34:09 PM UTC-4, John Larkin wrote:
> >> >> >> On Sat, 14 Jan 2023 16:20:53 -0800 (PST), "gnuarm.del...@gmail.com"
> >> >> >> <gnuarm.del...@gmail.com> wrote:
> >> >> >>
> >> >> >> >On Saturday, January 14, 2023 at 3:17:24 PM UTC-4, John Larkin wrote:
> >> >> >> >> On Sat, 14 Jan 2023 10:05:33 -0800 (PST), "gnuarm.del...@gmail.com"
> >> >> >> >> <gnuarm.del...@gmail.com> wrote:
> >> >> >> >>
> >> >> >> >> >On Saturday, January 14, 2023 at 12:08:03 PM UTC-4, John Larkin wrote:
> >> >> >> >> >> On Fri, 13 Jan 2023 21:20:50 -0800 (PST), "gnuarm.del...@gmail.com"
> >> >> >> >> >> <gnuarm.del...@gmail.com> wrote:
> >> >> >> >> >>
> >> >> >> >> >> >On Saturday, January 14, 2023 at 12:39:49 AM UTC-4, John Larkin wrote:
> >> >> >> >> >> >> On Sat, 7 Jan 2023 09:49:24 -0800 (PST), "gnuarm.del...@gmail.com"
> >> >> >> >> >> >> <gnuarm.del...@gmail.com> wrote:
> >> >> >> >> >> >>
> >> >> >> >> >> >> >A small board with a 100QFP is being redesigned for a new FPGA due to obsolescence. Gowin makes a 100QFP device that would be a good fit, but my customer has said "no" to the 100% Chinese brand... US government customers, ya know!
> >> >> >> >> >> >> >
> >> >> >> >> >> >> >So now I'm looking at a BGA. I don't want to get into fine PCB design rules, so 1.0 mm ball pitch is my preference. The only devices I can find that fit on the board have 196 or 256 pins. But the real problem is availability.
> >> >> >> >> >> >> >
> >> >> >> >> >> >> >Digikey has a few of the XC7S15-1FTGB196I and more a scheduled for delivery in April. Add in the various speed and temperature flavors trickling in (mostly in April) and I should be ok for the initial delivery in August... if I can get my hands on those. I don't know if Digikey factors in the backlog orders in these counts.
> >> >> >> >> >> >> >
> >> >> >> >> >> >> >Mouser shows great inventory of Efinix parts, particularly the T13 and T20 in a 0.8 mm 256 pin BGA, 10s of thousands in stock. But I'd rather work with a 1.0 mm BGA. Oddly enough, LCSC shows part numbers, but zero inventory.
> >> >> >> >> >> >> >
> >> >> >> >> >> >> >Anyone work with 0.8 mm BGAs? What PWB feature dimensions did you use? Did this impact the PWB cost?
> >> >> >> >> >> >> The 0.8 mm 256-ball T20 isn't bad...
> >> >> >> >> >> >>
> >> >> >> >> >> >> https://www.dropbox.com/s/xjqgj2pz9mdhtma/P941_FPGA.jpg?raw=1
> >> >> >> >> >> >
> >> >> >> >> >> >I can't really see much detail. It looks like there are virtually no pads on the vias under the BGA. What size are they?
> >> >> >> >> >> The BGAVIAs are 12.5 mil OD with 8 mil drills. The other vias on the
> >> >> >> >> >> board STANDARDVIA and POWERVIA are bigger.
> >> >> >> >> >
> >> >> >> >> >2.25 mil (0.057 mm) is a pretty narrow via ring. Why not have a larger via pad?
> >> >> >> >> I don't know. My PCB guy decides stuff like that. I'd guess that he
> >> >> >> >> wanted it to pass some design rule check, or maybe he started metric.
> >> >> >> >> The board houses haven't complained as far as I know.
> >> >> >> >>
> >> >> >> >> You should do your own thing and check with whoever will make your
> >> >> >> >> boards.
> >> >> >> >
> >> >> >> >Sounds good, but I've never been able to get a board house to even discuss these issues. They always take the approach that they will work with what I give them, which means, if it gives poor results, it's my problem.
> >> >> >> We always specify bare-board testing and warpage and tolerances, so we
> >> >> >> don't get bad boards. What we can get is expensive boards.
> >> >> >> >
> >> >> >> >There are a number of board companies with published capabilities, but they all vary, enough that there seems to be no consensus. Just like your via pad size. I've never seen a board house that says that would be a standard board. I was just looking at one company who wants 10 mil annular ring on inner layers and 7 mil annular ring on surface layers. That's a huge difference from 2.25 mil. On the other hand, they will print 2.5 mil trace/space!
> >> >> >> Zero annular ring seems to be OK on inners. That reduces capacitance.
> >> >> >> 5 or even 4 mil traces are usually standard price. I don't know why my
> >> >> >> guy used 6 on the board that I posted.
> >> >> >>
> >> >> >> We do email our board houses and often they answer!
> >> >> >
> >> >> >You aren't paying attention.
> >> >> That's because you're obnoxious.
> >> >
> >> >Wow! Talk about sensitive. What is going on with you???
> >> Just trying to help. My mistake.
> >
> >Dude, you are way too sensitive. Chillax! You'll live longer.
> Stop being obnoxious and you'll get more help.
>
> But not fom me.

I'm not going to continue to argue. Thank you for your opinions on using BGAs. But the price of your comments is too high. People have to walk on tiptoes around you to avoid insulting you. Sorry, but I left my ballet shoes in the car.

I would hope that someday, you might get some help with this issue. In the meantime, you are not the only electronic designer in the world. Other people design "things that work", every day.

Bye,

--

Rick C.

-+-+ Get 1,000 miles of free Supercharging
-+-+ Tesla referral code - https://ts.la/richard11209

Re: PCB Layout for BGAs

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From: jlar...@highlandSNIPMEtechnology.com (John Larkin)
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 by: John Larkin - Tue, 17 Jan 2023 15:46 UTC

On Mon, 16 Jan 2023 07:29:10 -0800 (PST), "gnuarm.del...@gmail.com"
<gnuarm.deletethisbit@gmail.com> wrote:

>On Monday, January 16, 2023 at 11:04:28 AM UTC-4, John Larkin wrote:
>> On Sun, 15 Jan 2023 20:11:34 -0800 (PST), "gnuarm.del...@gmail.com"
>> <gnuarm.del...@gmail.com> wrote:
>>
>> >On Sunday, January 15, 2023 at 2:37:04 PM UTC-4, John Larkin wrote:
>> >> On Sat, 14 Jan 2023 21:04:55 -0800 (PST), "gnuarm.del...@gmail.com"
>> >> <gnuarm.del...@gmail.com> wrote:
>> >>
>> >> >On Sunday, January 15, 2023 at 12:10:54 AM UTC-4, John Larkin wrote:
>> >> >> On Sat, 14 Jan 2023 17:52:45 -0800 (PST), "gnuarm.del...@gmail.com"
>> >> >> <gnuarm.del...@gmail.com> wrote:
>> >> >>
>> >> >> >On Saturday, January 14, 2023 at 9:34:09 PM UTC-4, John Larkin wrote:
>> >> >> >> On Sat, 14 Jan 2023 16:20:53 -0800 (PST), "gnuarm.del...@gmail.com"
>> >> >> >> <gnuarm.del...@gmail.com> wrote:
>> >> >> >>
>> >> >> >> >On Saturday, January 14, 2023 at 3:17:24 PM UTC-4, John Larkin wrote:
>> >> >> >> >> On Sat, 14 Jan 2023 10:05:33 -0800 (PST), "gnuarm.del...@gmail.com"
>> >> >> >> >> <gnuarm.del...@gmail.com> wrote:
>> >> >> >> >>
>> >> >> >> >> >On Saturday, January 14, 2023 at 12:08:03 PM UTC-4, John Larkin wrote:
>> >> >> >> >> >> On Fri, 13 Jan 2023 21:20:50 -0800 (PST), "gnuarm.del...@gmail.com"
>> >> >> >> >> >> <gnuarm.del...@gmail.com> wrote:
>> >> >> >> >> >>
>> >> >> >> >> >> >On Saturday, January 14, 2023 at 12:39:49 AM UTC-4, John Larkin wrote:
>> >> >> >> >> >> >> On Sat, 7 Jan 2023 09:49:24 -0800 (PST), "gnuarm.del...@gmail.com"
>> >> >> >> >> >> >> <gnuarm.del...@gmail.com> wrote:
>> >> >> >> >> >> >>
>> >> >> >> >> >> >> >A small board with a 100QFP is being redesigned for a new FPGA due to obsolescence. Gowin makes a 100QFP device that would be a good fit, but my customer has said "no" to the 100% Chinese brand... US government customers, ya know!
>> >> >> >> >> >> >> >
>> >> >> >> >> >> >> >So now I'm looking at a BGA. I don't want to get into fine PCB design rules, so 1.0 mm ball pitch is my preference. The only devices I can find that fit on the board have 196 or 256 pins. But the real problem is availability.
>> >> >> >> >> >> >> >
>> >> >> >> >> >> >> >Digikey has a few of the XC7S15-1FTGB196I and more a scheduled for delivery in April. Add in the various speed and temperature flavors trickling in (mostly in April) and I should be ok for the initial delivery in August... if I can get my hands on those. I don't know if Digikey factors in the backlog orders in these counts.
>> >> >> >> >> >> >> >
>> >> >> >> >> >> >> >Mouser shows great inventory of Efinix parts, particularly the T13 and T20 in a 0.8 mm 256 pin BGA, 10s of thousands in stock. But I'd rather work with a 1.0 mm BGA. Oddly enough, LCSC shows part numbers, but zero inventory.
>> >> >> >> >> >> >> >
>> >> >> >> >> >> >> >Anyone work with 0.8 mm BGAs? What PWB feature dimensions did you use? Did this impact the PWB cost?
>> >> >> >> >> >> >> The 0.8 mm 256-ball T20 isn't bad...
>> >> >> >> >> >> >>
>> >> >> >> >> >> >> https://www.dropbox.com/s/xjqgj2pz9mdhtma/P941_FPGA.jpg?raw=1
>> >> >> >> >> >> >
>> >> >> >> >> >> >I can't really see much detail. It looks like there are virtually no pads on the vias under the BGA. What size are they?
>> >> >> >> >> >> The BGAVIAs are 12.5 mil OD with 8 mil drills. The other vias on the
>> >> >> >> >> >> board STANDARDVIA and POWERVIA are bigger.
>> >> >> >> >> >
>> >> >> >> >> >2.25 mil (0.057 mm) is a pretty narrow via ring. Why not have a larger via pad?
>> >> >> >> >> I don't know. My PCB guy decides stuff like that. I'd guess that he
>> >> >> >> >> wanted it to pass some design rule check, or maybe he started metric.
>> >> >> >> >> The board houses haven't complained as far as I know.
>> >> >> >> >>
>> >> >> >> >> You should do your own thing and check with whoever will make your
>> >> >> >> >> boards.
>> >> >> >> >
>> >> >> >> >Sounds good, but I've never been able to get a board house to even discuss these issues. They always take the approach that they will work with what I give them, which means, if it gives poor results, it's my problem.
>> >> >> >> We always specify bare-board testing and warpage and tolerances, so we
>> >> >> >> don't get bad boards. What we can get is expensive boards.
>> >> >> >> >
>> >> >> >> >There are a number of board companies with published capabilities, but they all vary, enough that there seems to be no consensus. Just like your via pad size. I've never seen a board house that says that would be a standard board. I was just looking at one company who wants 10 mil annular ring on inner layers and 7 mil annular ring on surface layers. That's a huge difference from 2.25 mil. On the other hand, they will print 2.5 mil trace/space!
>> >> >> >> Zero annular ring seems to be OK on inners. That reduces capacitance.
>> >> >> >> 5 or even 4 mil traces are usually standard price. I don't know why my
>> >> >> >> guy used 6 on the board that I posted.
>> >> >> >>
>> >> >> >> We do email our board houses and often they answer!
>> >> >> >
>> >> >> >You aren't paying attention.
>> >> >> That's because you're obnoxious.
>> >> >
>> >> >Wow! Talk about sensitive. What is going on with you???
>> >> Just trying to help. My mistake.
>> >
>> >Dude, you are way too sensitive. Chillax! You'll live longer.
>> Stop being obnoxious and you'll get more help.
>>
>> But not fom me.
>
>I'm not going to continue to argue. Thank you for your opinions on using BGAs. But the price of your comments is too high. People have to walk on tiptoes around you to avoid insulting you. Sorry, but I left my ballet shoes in the car.
>
>I would hope that someday, you might get some help with this issue. In the meantime, you are not the only electronic designer in the world. Other people design "things that work", every day.
>
>Bye,

Oh, are you the rick from SED? I should have noticed. Bye indeed.

Re: PCB Layout for BGAs

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From: mr...@oho-elektronik.de (Mike Randelzhofer)
Newsgroups: comp.arch.fpga
Subject: Re: PCB Layout for BGAs
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 by: Mike Randelzhofer - Fri, 27 Jan 2023 16:39 UTC

Am 07.01.2023 um 18:49 schrieb gnuarm.del...@gmail.com:
> A small board with a 100QFP is being redesigned for a new FPGA due to obsolescence. Gowin makes a 100QFP device that would be a good fit, but my customer has said "no" to the 100% Chinese brand... US government customers, ya know!
>
> So now I'm looking at a BGA. I don't want to get into fine PCB design rules, so 1.0 mm ball pitch is my preference. The only devices I can find that fit on the board have 196 or 256 pins. But the real problem is availability.
>
> Digikey has a few of the XC7S15-1FTGB196I and more a scheduled for delivery in April. Add in the various speed and temperature flavors trickling in (mostly in April) and I should be ok for the initial delivery in August... if I can get my hands on those. I don't know if Digikey factors in the backlog orders in these counts.
>
> Mouser shows great inventory of Efinix parts, particularly the T13 and T20 in a 0.8 mm 256 pin BGA, 10s of thousands in stock. But I'd rather work with a 1.0 mm BGA. Oddly enough, LCSC shows part numbers, but zero inventory.
>
> Anyone work with 0.8 mm BGAs? What PWB feature dimensions did you use? Did this impact the PWB cost?
>

I've done a 324pin 0.8mm BGA recently.

My PCB fab is:

https://www.multi-circuit-boards.eu/en/index.html,

they also have a german office near my house.

I used all standard parameters like 0.2mm holes, 0.4mm via diameters and
0.1mm trace width and spaces on a 6-layer board, GND at layers 2 and 5.
Power planes are used on layer 3, as well as additional power and signal
routing.

All was manufactured perfectly fine and the board works as expected.

I was the schematics developer as well as the layouter.

There are some optimazations you can do if you do both.
You can try to join several pwr pins to one via and then get the space
for placing 0402 capacitors under the BGA.
(Recommended is max. 2 BGA-pads to one via)

Using 0201 caps saves you from doing tricky via omitting.
Using 0204 caps did't help in my case.

You can also ignore some I/Os for routing critical high speed nets.

There is lots of room for playing around optimizing and finally you can
use all BGA-pads.
I used Altium and partly it was a fun job as well as a mess with length
matching.

Doing 0.8mm is an easy job IMHO, also have done some 1mm BGAs, then used
0.5mm via diameter.
The advantage of using 2 tracks between 2 balls is not too big.
A 1mm 196ball FPGA has the same size as a 324pin 0.8mm chip, 15x15mm.

And now how to assemble a BGA pcb ?
Look here:
https://www.youtube.com/watch?v=EMCz0VsEbqc

Mike

PS:
Xilinx recommends lots of caps in power distribution network however on
the eval boards like SP701, AC701 and others these caps are placed
centimeters away from the chip...

--
Mike Randelzhofer, OHO-Elektronik

Re: PCB Layout for BGAs

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 by: gnuarm.del...@gmail. - Fri, 27 Jan 2023 20:01 UTC

On Friday, January 27, 2023 at 12:39:16 PM UTC-4, Mike Randelzhofer wrote:
> Am 07.01.2023 um 18:49 schrieb gnuarm.del...@gmail.com:
> > A small board with a 100QFP is being redesigned for a new FPGA due to obsolescence. Gowin makes a 100QFP device that would be a good fit, but my customer has said "no" to the 100% Chinese brand... US government customers, ya know!
> >
> > So now I'm looking at a BGA. I don't want to get into fine PCB design rules, so 1.0 mm ball pitch is my preference. The only devices I can find that fit on the board have 196 or 256 pins. But the real problem is availability.
> >
> > Digikey has a few of the XC7S15-1FTGB196I and more a scheduled for delivery in April. Add in the various speed and temperature flavors trickling in (mostly in April) and I should be ok for the initial delivery in August.... if I can get my hands on those. I don't know if Digikey factors in the backlog orders in these counts.
> >
> > Mouser shows great inventory of Efinix parts, particularly the T13 and T20 in a 0.8 mm 256 pin BGA, 10s of thousands in stock. But I'd rather work with a 1.0 mm BGA. Oddly enough, LCSC shows part numbers, but zero inventory.
> >
> > Anyone work with 0.8 mm BGAs? What PWB feature dimensions did you use? Did this impact the PWB cost?
> >
> I've done a 324pin 0.8mm BGA recently.
>
> My PCB fab is:
>
> https://www.multi-circuit-boards.eu/en/index.html,
>
> they also have a german office near my house.
>
> I used all standard parameters like 0.2mm holes, 0.4mm via diameters and
> 0.1mm trace width and spaces on a 6-layer board, GND at layers 2 and 5.
> Power planes are used on layer 3, as well as additional power and signal
> routing.
>
> All was manufactured perfectly fine and the board works as expected.
>
> I was the schematics developer as well as the layouter.
>
> There are some optimazations you can do if you do both.
> You can try to join several pwr pins to one via and then get the space
> for placing 0402 capacitors under the BGA.
> (Recommended is max. 2 BGA-pads to one via)
>
> Using 0201 caps saves you from doing tricky via omitting.
> Using 0204 caps did't help in my case.
>
> You can also ignore some I/Os for routing critical high speed nets.
>
> There is lots of room for playing around optimizing and finally you can
> use all BGA-pads.
> I used Altium and partly it was a fun job as well as a mess with length
> matching.
>
> Doing 0.8mm is an easy job IMHO, also have done some 1mm BGAs, then used
> 0.5mm via diameter.
> The advantage of using 2 tracks between 2 balls is not too big.
> A 1mm 196ball FPGA has the same size as a 324pin 0.8mm chip, 15x15mm.
>
> And now how to assemble a BGA pcb ?
> Look here:
> https://www.youtube.com/watch?v=EMCz0VsEbqc
>
> Mike
>
> PS:
> Xilinx recommends lots of caps in power distribution network however on
> the eval boards like SP701, AC701 and others these caps are placed
> centimeters away from the chip...
>
> --
> Mike Randelzhofer, OHO-Elektronik

Thanks for the info. That was a very good explanation/description. I have been considering 0402 as well as 0201 parts. I don't have high speed signals. This is a redo from 2008 and a couple of EOL parts, including the FPGA. If the part was still available, I would be using a 100TQFP.

I would like to use the 196 pin, 1 mm pitch Xilinx part, but while there are just enough parts in inventory (in various speed/temperatures) to do the initial order, further quantities are a year away. If it were a slightly more perfect world, I'd probably go with an XC7S part. The XC7S6 would probably do the job ok, but I'd want to bump up to the XC7S15 just to have clear breathing room. I think the parts are footprint compatible, so if I want to save the $5, I could always switch at a different time. Interesting that there's only 100 I/Os available in a 196 ball package, no matter which die is in it!

Most likely, I'm going with the Efinix T20. That cuts the FPGA cost in half! I just have to work with 0.8 mm ball pitch. Again, I could probably use a T13, but Efinix uses cells for routing, so I'm very unclear as to the best size and, again, very little difference in price. Also, 195 I/Os! Don't need them on the product board, but I also am building a test fixture, where I'll use the same part and the extra I/Os help a lot!

--

Rick C.

-++- Get 1,000 miles of free Supercharging
-++- Tesla referral code - https://ts.la/richard11209

Re: PCB Layout for BGAs

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 by: gnuarm.del...@gmail. - Sat, 28 Jan 2023 01:24 UTC

The remaining problem I'm having, is the op amps I use to drive the outputs.. They need to drive 50 ohm loads, single ended, or 600 ohm, differential, from a single 12V supply. The LM8272 parts I picked 14 years ago, are uniquely qualified for the high current output, 12V supply and MSOP8 package. Unfortunately, they have a 1 year lead time and virtually none in distribution, other than no name outfits from overseas.

The board is very small and crowded. Everything I've tried to replace them with is either too large, or isn't rated for 12V power, or just won't drive the current. I ran through the analysis again, and I just can't find a better part.

The circuit I'm using uses positive feedback to make a 12.1 ohm output resistor look like a 50 ohm output impedance, from a higher V+. Works the champ. Looking at the typical I/V output curve, it will drive 80 mA into the 62.1 ohm load with 8 Vpp on the 50 ohm load.

Of course, that's a typical number, not a spec, but this is what we are selling now and the customer is happy with it. So I want to give them the same thing.

What really surprises me, is that headphone amps (which should be perfect for this) are made to run from 5V only and higher power devices are mostly class D, which would need large inductors to smooth out the carrier frequency (large for this board). It's hard to find anything class AB that will run on a 12V supply.

--

Rick C.

-+++ Get 1,000 miles of free Supercharging
-+++ Tesla referral code - https://ts.la/richard11209

Re: PCB Layout for BGAs

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 by: David Brown - Sat, 28 Jan 2023 12:35 UTC

On 27/01/2023 17:39, Mike Randelzhofer wrote:

>
> PS:
> Xilinx recommends lots of caps in power distribution network however on
> the eval boards like SP701, AC701 and others these caps are placed
> centimeters away from the chip...
>

As long as the path between the bypass caps and the power balls is low
inductance (i.e., minimal paths then vias to power polygons) and low DC
impedance (i.e., power polygons covering the caps and the device
itself), there's no problem being centimetres away. If I remember my
numbers correctly, at 100 MHz a tenth of the wavelength will be about
5cm, so placing closer than that gives no benefits. Details can vary
depending on your needs, of course - if you have a lot of hard
high-power simultaneous switching at higher frequencies then you need to
be much more careful with bypassing than if it is more spread out.


devel / comp.arch.fpga / Re: PCB Layout for BGAs

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