Hello,

More of my philosophy about quantum computers and about how Machine
Learning gets a quantum speedup and more of my thoughts..

I am a white arab from Morocco, and i think i am smart since i have also
invented many scalable algorithms and algorithms..

IBM says thousands of quantum computers will be on sale by 2025, with
4,000 qubits, It represents a leap from its current hardware of 127 qubits

Read more here:

https://hpc-developpez-com.translate.goog/actu/333533/IBM-affirme-que-des-milliers-d-ordinateurs-quantiques-seront-en-vente-d-ici-2025-avec-4-000-qubits-il-represente-un-bond-par-rapport-a-son-materiel-actuel-de-127-qubits/?_x_tr_sl=auto&_x_tr_tl=en&_x_tr_hl=en

I think i am smart, and as you have just noticed, i have just talked
about quantum computers, read my below thoughts about it, and now we
have to also ask how Machine Learning gets a quantum speedup, and here
is an interesting article about it so that you understand that quantum
computers are also very interesting to have:

https://www.quantamagazine.org/ai-gets-a-quantum-computing-speedup-20220204/

And IBM is releasing the roadmap that we think will take us from the
noisy, small-scale quantum computers of today to the million-plus qubit
quantum computers of the future. And IBM team is developing a suite of
scalable, increasingly larger and better processors, with a 1,000-plus
qubit device, called IBM Quantum Condor, targeted for the end of 2023,
you can read about it on the following interesting article:

https://research.ibm.com/blog/ibm-quantum-roadmap

And you can read my thoughts about artificial intelligence and
productivity and about China and its artificial intelligence and
computer chips in the following web link:

https://groups.google.com/g/alt.culture.morocco/c/UOt_4qTgN8M

And you can read my thoughts about the next industrial revolution and
about Exascale supercomputers and more in the following web link:

https://groups.google.com/g/alt.culture.morocco/c/hT6faP8cndE

And you can read my following thoughts about 3D stacking in CPUs and
about EUV (extreme ultra violet) and about scalability and more in the
following web link:

https://groups.google.com/g/alt.culture.morocco/c/USMMhMB9WIE

And you can read my following thoughts about Nanotechnology and about
Exponential Progress in the following web link:

https://groups.google.com/g/alt.culture.morocco/c/mjE_2AG1TKQ

And read my previous thoughts:

More of my philosophy about quantum computers and about CPUs and more..

For a parallel computer, we need to have one billion different
processors. In a quantum computer, a single register can perform a
billion computations since a qubit of a register of a quantum computer
can be both in two states 1 and 0, this is known as quantum parallelism,
so, what characteristics do the problems where quantum computing wins
big share? i think one thing that they share is that they tend to be
about some global property of a large mathematical system, and
connecting quantum computing to "Moore's Law" is sort of foolish -- it's
not an all-purpose technique for faster computers, but a limited
technique that makes certain types of specialized problems easier, while
leaving most of the things we actually use computers for unaffected.

So i think that classical computers are also really useful,
so read my following thoughts so that to understand:

More of my philosophy about Intel Thread Director and about CPUs and more..

I invite you to read the following interesting article about Intel
Thread Director:

How Intel Thread Director makes Alder Lake and Windows 11 a match made
in heaven

https://www.digitaltrends.com/computing/how-intel-thread-director-marries-alder-lake-windows-11/

And more of my philosophy about AVX-512 and about Delphi 11.1 and more
of my thoughts..

I am also using Delphi and Freepascal compilers, and the new Delphi 11.1
compiler provides inline assembler (asm code) support for newer sets of
instructions, including AVX2 (ymm) and AVX512 (zmm), you can read about
it here:

https://lecturepress.com/tech-journal/dev-tools/delphi-11-is-released/

And the new Delphi 11.1 is here..

Build Native Apps 5x Faster With One Codebase
For Windows, Android, iOS, macOS, and Linux

You can read more about it here:

https://www.embarcadero.com/products/delphi

More of my philosophy about AMD Zen 4 and more of my thoughts..

I have just forgotten to talk about AVX-512 support in Zen 4,
and Zen 4 will be out in 2022, so i think that Zen 4 will support
AVX-512 and that's a good news, and you can read about it here:

Gigabyte Leaks AMD Zen 4 Details: 5nm, AVX-512, 96 Cores, 12-Channel DDR5

Read more here:

https://www.extremetech.com/computing/325888-gigabyte-leaks-amd-zen-4-details-5nm-avx-512-96-cores-12-channel-ddr5

And read my following previous thoughts:

More of my philosophy about Intel's Alder Lake and about ARM and x86
memory models and more of my thoughts..

I think i am smart, and as you have just noticed, i have just talked
about Epyc Zen 4 and Zen 5 and i have just talked about the network
topology inside multicore CPUs etc. read them in my thoughts below, and
i think that my talking about the network topology of multicore CPUs
will still be valid if the new Intel's Alder Lake also becomes a server
CPU like a Xeon or Epyc, so here is my thoughts about Intel Alder Lake
and about ARM and x86 memory models:

I think that the new Intel's Alder Lake is a winner, and i think that
the performance/efficiency core design of Intel's Alder Lake could find
its way into servers, workstations, or embedded IT systems as you can
notice it by reading the following article:

https://www.networkworld.com/article/3631072/will-intels-new-desktop-cpu-design-come-to-its-xeon-server-chips.html

More of my philosophy about the ARM and x86 memory models and more
of my thoughts..

I think i am smart, and as you have just noticed i have just said
that x86 is the future(read my below thoughts so that to understand why)
, but i think that ARM architecture has another big defect, since its
weak hardware memory model has not balanced correctly between safety or
security and performance, so i think that it is a big defect in ARM,
read carefully the following article about x86 TSO memory model:

https://research.swtch.com/hwmm

So notice that Intel says that it has well balanced between safety or
security and performance by saying the following:

"To address these problems, Owens et al. proposed the x86-TSO model,
based on the earlier SPARCv8 TSO model. At the time they claimed that
“To the best of our knowledge, x86-TSO is sound, is strong enough to
program above, and is broadly in line with the vendors’ intentions.” A
few months later Intel and AMD released new manuals broadly adopting
this model."

And read more here so that to understand that x86 TSO memory model is
very good:

https://jakob.engbloms.se/archives/1435

So i think that ARM has a big defect since it has to provide
with TSO memory model as RISC-V is providing it, since it is
very important for the security or safety concerns

More of my philosophy about the fight between x86 and ARM architectures
and more of my thoughts..

I invite you to read the following interesting article about the
fight between x86 or x64 and ARM architectures

ARM Servers on AWS: How to Save up to 30%

Read more here:

https://opsworks.co/arm-servers-on-aws-how-to-save-up-to-30/

So notice that it says the following about ARM CPU architecture compared
to x86 CPU architecture:

"Running in a standard setting, Graviton2 performs 20% better, and the
power consumption of the Arm core is about half that of other types of
cores. Since the cost savings are also about 20%, performance-cost
improvements reach 40%."

But i think that the new Intel's Alder Lake is a new winner, since
read the following article so that to notice:

Intel's Alder Lake chip could speed PCs by 30% while saving battery power

https://www.cnet.com/tech/computing/intels-alder-lake-chip-could-speed-pcs-by-30-while-saving-battery-power/

Also here is the other way that is using Intel so that to fight ARM:

Intel CEO says co-designed x86 chips will fend off Arm threat

Read more here:

https://www.pcgamer.com/intel-x86-vs-arm-gelsinger/

So i think that x86 architecture is the future.

And you can read my following thoughts about 3D stacking in CPUs and
about EUV (extreme ultra violet) and about scalability and more in the
following web link:

https://groups.google.com/g/alt.culture.morocco/c/USMMhMB9WIE

More of my philosophy about the next Epyc Zen 4 and Epyc Zen 5 CPUs and
more of my thoughts..

I have just read the following article about the next AMD EPYC Turin Zen
5 CPUs Rumored To Feature Up To 256 Cores & 192 Core:

https://wccftech.com/amd-epyc-turin-zen-5-cpus-rumored-to-feature-up-to-256-cores-192-core-configurations-max-600w-configurable-tdps/

And notice the data in the above article, so i can say the following
with my calculations:

DDR5 will arrive with a minimum speed of at 4800Mbit/s, which works out
to 76.8GB/s of bandwidth in a dual-channel configuration,
and each CCX in Epyc Zen 4 and Zen 4C can be enabled as its own NUMA
domain, so in the next AMD EPYC Genoa and AMD EPYC Bergamo CPUs there
will be 12 NUMA nodes per socket, with respectively DDR5-5200 and
DDR5-5600 support on those CPUs, so the AMD EPYC Genoa can support a
memory bandwidth of 5.2 GT/s x 8 bytes per channel x 12 channels for one
socket, and that equals 499.2 GB per second or 998.4 GB per second for
two sockets, and the AMD EPYC Bergamo can support a memory bandwidth of
5.6 GT/s x 8 bytes per channel x 12 channels for one socket, that equals
537.6 GB per second or 1075.2 GB per second for two sockets, so as you
notice that the memory bandwidth will become powerful on those kind of
CPUs of Zen 4 and Zen 5, and the IPC gain from Zen 3 to Zen 4 is at
around 20% and 40% Overall Performance Boost of Zen 4 over Zen 3, and
Zen 5 will have 20-40% IPC increase over Zen 4, and for the network
topology in those next multicores CPUs, you can read my following
thoughts about it: