I'm going use an insane number of 7x20mm SPST relays, so I'm
testing relays and drivers.

Here's a start.

https://www.dropbox.com/scl/fo/ns08x686afbayjsw8c2ab/h?rlkey=m9dr3wdnhd3v6ftdhwga65mzb&dl=0

The waveforms are drain voltage and source current.

Two surprises: that little 100 volt logic-level mosfet
avalanches happily at just over 100 volts.

The drain voltage doesn't ring. The Q of that relay coil
must be terrible.

The coil is about 720 ohms and 1 henry un-energized. I
assume it's more when it's closed.

More testing today, contacts too.

I think I can use one mosfet per relay on the bottom side,
tucked between the relay pins, and drive the fets from
individual FPGA balls, with no catch diodes. Let it
avalanche.

AoEx claims that modern mosfets avalanche happily as long as
the dissipation is reasonable.

On Wednesday, August 9, 2023 at 10:59:01 AM UTC-4, John Larkin wrote:
> I'm going use an insane number of 7x20mm SPST relays, so I'm
> testing relays and drivers.
>
> Here's a start.
>
> https://www.dropbox.com/scl/fo/ns08x686afbayjsw8c2ab/h?rlkey=m9dr3wdnhd3v6ftdhwga65mzb&dl=0
>
> The waveforms are drain voltage and source current.
>
> Two surprises: that little 100 volt logic-level mosfet
> avalanches happily at just over 100 volts.
>
> The drain voltage doesn't ring. The Q of that relay coil
> must be terrible.
>
> The coil is about 720 ohms and 1 henry un-energized. I
> assume it's more when it's closed.
>
> More testing today, contacts too.
>
> I think I can use one mosfet per relay on the bottom side,
> tucked between the relay pins, and drive the fets from
> individual FPGA balls, with no catch diodes. Let it
> avalanche.
>
> AoEx claims that modern mosfets avalanche happily as long as
> the dissipation is reasonable.

Some people will be aghast at those claims:

https://ieeexplore.ieee.org/document/6086767

On a sunny day (Wed, 09 Aug 2023 07:58:43 -0700) it happened John Larkin
<jjlarkin@highlandtechnology.com> wrote in
<ll97di1spvf0gp0o2qhlhokk2jnhh8h1ka@4ax.com>:

>
>I'm going use an insane number of 7x20mm SPST relays, so I'm
>testing relays and drivers.
>
>Here's a start.
>
>https://www.dropbox.com/scl/fo/ns08x686afbayjsw8c2ab/h?rlkey=m9dr3wdnhd3v6ftdhwga65mzb&dl=0
>
>The waveforms are drain voltage and source current.
>
>Two surprises: that little 100 volt logic-level mosfet
>avalanches happily at just over 100 volts.
>
>The drain voltage doesn't ring. The Q of that relay coil
>must be terrible.
>
>The coil is about 720 ohms and 1 henry un-energized. I
>assume it's more when it's closed.
>
>More testing today, contacts too.
>
>I think I can use one mosfet per relay on the bottom side,
>tucked between the relay pins, and drive the fets from
>individual FPGA balls, with no catch diodes. Let it
>avalanche.
>
>AoEx claims that modern mosfets avalanche happily as long as
>the dissipation is reasonable.

Probably true, never managed to blow one up driving inductive loads.
Mostly used TO220 IRLZ34N....
VGS Gate-to-Source Voltage � 16 V
EAS Single Pulse Avalanche Energy 110 mJ
IAR Avalanche Current 16 A
EAR Repetitive Avalanche Energy 6.8 mJ
dv/dt Peak Diode Recovery dv/dt ƒ 5.0 V/ns
V(BR)DSS Drain-to-Source Breakdown Voltage 55 VGS = 0V, ID = 250 �A

http://panteltje.nl/pub/ultrasonic_anti_fouling_test_board_IMG_5135.JPG

On Wednesday, August 9, 2023 at 10:59:01 AM UTC-4, John Larkin wrote:
> I'm going use an insane number of 7x20mm SPST relays, so I'm
> testing relays and drivers.
>
> Here's a start.
>
> https://www.dropbox.com/scl/fo/ns08x686afbayjsw8c2ab/h?rlkey=m9dr3wdnhd3v6ftdhwga65mzb&dl=0
>
> The waveforms are drain voltage and source current.
>
> Two surprises: that little 100 volt logic-level mosfet
> avalanches happily at just over 100 volts.
>
> The drain voltage doesn't ring. The Q of that relay coil
> must be terrible.
>
> The coil is about 720 ohms and 1 henry un-energized. I
> assume it's more when it's closed.
>
> More testing today, contacts too.
>
> I think I can use one mosfet per relay on the bottom side,
> tucked between the relay pins, and drive the fets from
> individual FPGA balls, with no catch diodes. Let it
> avalanche.
>
> AoEx claims that modern mosfets avalanche happily as long as
> the dissipation is reasonable.

Key phrase is "avalanche ruggedness."

https://assets.nexperia.com/documents/application-note/AN10273.pdf

On Wed, 9 Aug 2023 09:28:51 -0700 (PDT), Fred Bloggs
<bloggs.fredbloggs.fred@gmail.com> wrote:

>On Wednesday, August 9, 2023 at 10:59:01?AM UTC-4, John Larkin wrote:
>> I'm going use an insane number of 7x20mm SPST relays, so I'm
>> testing relays and drivers.
>>
>> Here's a start.
>>
>> https://www.dropbox.com/scl/fo/ns08x686afbayjsw8c2ab/h?rlkey=m9dr3wdnhd3v6ftdhwga65mzb&dl=0
>>
>> The waveforms are drain voltage and source current.
>>
>> Two surprises: that little 100 volt logic-level mosfet
>> avalanches happily at just over 100 volts.
>>
>> The drain voltage doesn't ring. The Q of that relay coil
>> must be terrible.
>>
>> The coil is about 720 ohms and 1 henry un-energized. I
>> assume it's more when it's closed.
>>
>> More testing today, contacts too.
>>
>> I think I can use one mosfet per relay on the bottom side,
>> tucked between the relay pins, and drive the fets from
>> individual FPGA balls, with no catch diodes. Let it
>> avalanche.
>>
>> AoEx claims that modern mosfets avalanche happily as long as
>> the dissipation is reasonable.
>
>Some people will be aghast at those claims:
>
>https://ieeexplore.ieee.org/document/6086767

Paywalled. And typically useless.

On 8/9/2023 19:34, John Larkin wrote:
> On Wed, 9 Aug 2023 09:28:51 -0700 (PDT), Fred Bloggs
> <bloggs.fredbloggs.fred@gmail.com> wrote:
>
>> On Wednesday, August 9, 2023 at 10:59:01?AM UTC-4, John Larkin wrote:
>>> I'm going use an insane number of 7x20mm SPST relays, so I'm
>>> testing relays and drivers.
>>>
>>> Here's a start.
>>>
>>> https://www.dropbox.com/scl/fo/ns08x686afbayjsw8c2ab/h?rlkey=m9dr3wdnhd3v6ftdhwga65mzb&dl=0
>>>
>>> The waveforms are drain voltage and source current.
>>>
>>> Two surprises: that little 100 volt logic-level mosfet
>>> avalanches happily at just over 100 volts.
>>>
>>> The drain voltage doesn't ring. The Q of that relay coil
>>> must be terrible.
>>>
>>> The coil is about 720 ohms and 1 henry un-energized. I
>>> assume it's more when it's closed.
>>>
>>> More testing today, contacts too.
>>>
>>> I think I can use one mosfet per relay on the bottom side,
>>> tucked between the relay pins, and drive the fets from
>>> individual FPGA balls, with no catch diodes. Let it
>>> avalanche.
>>>
>>> AoEx claims that modern mosfets avalanche happily as long as
>>> the dissipation is reasonable.
>>
>> Some people will be aghast at those claims:
>>
>> https://ieeexplore.ieee.org/document/6086767
>
> Paywalled. And typically useless.
>

Well over 30 years ago I had designed an ISA bus card MCA with
a 4.5kV HV source - no multiplier, straight flyback.
( http://tgi-sci.com/dsv/isasc.gif , the HV module would plug into
the missing corner, a metal box with a core inside same as the one
visible, totally potted which was overkill of course).
I had put an IRF540 as a switch and at some point someone messed
with the coil, put more windings in the primary - which made them
see power reduced somewhat, testing well below 5kV. Then - shortly
before I quit to start my company- I noticed the HV module was
getting very hot but I ignored that, it was usable after all.
I don't remember how and when I discovered the 540 was going
avalanche every cycle at somewhat above 100V, hence the heat.
May be it was on one of my subsequent HV sources.
Then I remembered why initially I had put an IRF840 (much higher D-S
max. voltage)...
The moral of the story is that the IRF540 lived, no time limit to
talk about.
Then on a much newer HV (<15 years old) I put some other MOSFET,
not looking if it had an avalanche spec, 100V D-S max again.
It would barely see >100V but if it saw it would just die...
So I went irf540 again, never heard of it since.
The way your waveform looks I think you won't hear of your
MOSFETs either (obviously I don't know that, unless they are
IRF540-s... ).

On Wednesday, August 9, 2023 at 7:59:01 AM UTC-7, John Larkin wrote:
> I'm going use an insane number of 7x20mm SPST relays, so I'm
> testing relays and drivers.
>
> Here's a start.
>
> https://www.dropbox.com/scl/fo/ns08x686afbayjsw8c2ab/h?rlkey=m9dr3wdnhd3v6ftdhwga65mzb&dl=0
>
> The waveforms are drain voltage and source current.
>
> Two surprises: that little 100 volt logic-level mosfet
> avalanches happily at just over 100 volts.
>
> The drain voltage doesn't ring. The Q of that relay coil
> must be terrible.

That's deliberate, I trust: relays have builtin intrinsic hysteresis
(that's why hold current can be lower than make current),
and high frequency coil response is not required any more
than recovery of stored energy. The only exception would be
AC-coil relays, where AC losses could cook the steel core.

On Wed, 9 Aug 2023 09:32:10 -0700 (PDT), Fred Bloggs
<bloggs.fredbloggs.fred@gmail.com> wrote:

>On Wednesday, August 9, 2023 at 10:59:01?AM UTC-4, John Larkin wrote:
>> I'm going use an insane number of 7x20mm SPST relays, so I'm
>> testing relays and drivers.
>>
>> Here's a start.
>>
>> https://www.dropbox.com/scl/fo/ns08x686afbayjsw8c2ab/h?rlkey=m9dr3wdnhd3v6ftdhwga65mzb&dl=0
>>
>> The waveforms are drain voltage and source current.
>>
>> Two surprises: that little 100 volt logic-level mosfet
>> avalanches happily at just over 100 volts.
>>
>> The drain voltage doesn't ring. The Q of that relay coil
>> must be terrible.
>>
>> The coil is about 720 ohms and 1 henry un-energized. I
>> assume it's more when it's closed.
>>
>> More testing today, contacts too.
>>
>> I think I can use one mosfet per relay on the bottom side,
>> tucked between the relay pins, and drive the fets from
>> individual FPGA balls, with no catch diodes. Let it
>> avalanche.
>>
>> AoEx claims that modern mosfets avalanche happily as long as
>> the dissipation is reasonable.
>
>Key phrase is "avalanche ruggedness."
>
>https://assets.nexperia.com/documents/application-note/AN10273.pdf

I just stuck in that fet because I had some handy. But it works
nicely.

It does fly back from 12 to over 100, so the inductor isn't really
bad.

On Wednesday, August 9, 2023 at 4:58:52 PM UTC-4, John Larkin wrote:
> On Wed, 9 Aug 2023 09:32:10 -0700 (PDT), Fred Bloggs
> <bloggs.fred...@gmail.com> wrote:
> >On Wednesday, August 9, 2023 at 10:59:01?AM UTC-4, John Larkin wrote:
> >> I'm going use an insane number of 7x20mm SPST relays, so I'm
> >> testing relays and drivers.
> >>
> >> Here's a start.
> >>
> >> https://www.dropbox.com/scl/fo/ns08x686afbayjsw8c2ab/h?rlkey=m9dr3wdnhd3v6ftdhwga65mzb&dl=0
> >>
> >> The waveforms are drain voltage and source current.
> >>
> >> Two surprises: that little 100 volt logic-level mosfet
> >> avalanches happily at just over 100 volts.
> >>
> >> The drain voltage doesn't ring. The Q of that relay coil
> >> must be terrible.
> >>
> >> The coil is about 720 ohms and 1 henry un-energized. I
> >> assume it's more when it's closed.
> >>
> >> More testing today, contacts too.
> >>
> >> I think I can use one mosfet per relay on the bottom side,
> >> tucked between the relay pins, and drive the fets from
> >> individual FPGA balls, with no catch diodes. Let it
> >> avalanche.
> >>
> >> AoEx claims that modern mosfets avalanche happily as long as
> >> the dissipation is reasonable.
> >
> >Key phrase is "avalanche ruggedness."
> >
> >https://assets.nexperia.com/documents/application-note/AN10273.pdf
> I just stuck in that fet because I had some handy. But it works
> nicely.
>
> It does fly back from 12 to over 100, so the inductor isn't really
> bad.

Right, the currents are so small, avalanche can't be a problem. I was trying to find some info on VBR(DSS) being >= VMAX, DG, which would be a problem, but Infineon and Toshiba and some others who fully characterize their avalanche performance, don't bother mentioning it, so I guess it's not a problem.

On Wed, 09 Aug 2023 07:58:43 -0700, John Larkin
<jjlarkin@highlandtechnology.com> wrote:

>
>I'm going use an insane number of 7x20mm SPST relays, so I'm
>testing relays and drivers.
>
>Here's a start.
>
>https://www.dropbox.com/scl/fo/ns08x686afbayjsw8c2ab/h?rlkey=m9dr3wdnhd3v6ftdhwga65mzb&dl=0
>
>The waveforms are drain voltage and source current.
>
>Two surprises: that little 100 volt logic-level mosfet
>avalanches happily at just over 100 volts.
>
>The drain voltage doesn't ring. The Q of that relay coil
>must be terrible.
>
>The coil is about 720 ohms and 1 henry un-energized. I
>assume it's more when it's closed.
>
>More testing today, contacts too.
>
>I think I can use one mosfet per relay on the bottom side,
>tucked between the relay pins, and drive the fets from
>individual FPGA balls, with no catch diodes. Let it
>avalanche.
>
>AoEx claims that modern mosfets avalanche happily as long as
>the dissipation is reasonable.

Added a contact test.

https://www.dropbox.com/scl/fi/swaz2vt1q96bft8npna1m/Rly_Test_WB_1.jpg?rlkey=pe5squ4fbpbg6js2dwedz9nru&raw=1

https://www.dropbox.com/scl/fi/xt88vo5boin9j83gbehjl/Waves_3.jpg?rlkey=wnh5q5i88o3f77uwy8wyzorr2&raw=1

Not bad for a $1, 5-amp relay.