NCD2100 is a digital capacitor. We use it in a couple of products to
tune an LC oscillator at powerup, to get close to 50 MHz. Then a
narrow-pull-range varicap takes over.

What happens, when the oscillator starts up, is that the frequency
chirps, namely jumps up with a time constant of a couple microseconds.
Then it settles down. If we stop it and restart soon, it's right on.
But the longer it's off, the bigger chirp we'll get next time it
starts. That time constant is milliseconds.

This was driving us to drink. There was no explanation. FR4
capacitance hook? Thermals, in 2 us? Copper plane eddy currents? Power
supplies? Phemt weirdness?

After thinking it over, I had a revelation at 3AM.

https://www.dropbox.com/scl/fo/aucofxys571v8xt2vu516/h?rlkey=wdvotmfqgk8oxvfhnz2jjylb3&dl=0
The Spice model is a conjecture about what's happening inside the
chip. A substrate diode is rectifying the AC input and modulating
diode and mosfet capacitances. The presumed resistor discharges the
rectified DC slowly. Annoying experiments verify the concept.

They should have returned that resistor (if it's a real resistor) to
VCC/2, not ground.

Our posts get reposted and can be googled, so maybe this will help
someone.

The next board rev will dump the Ixys and use a 16-bit DAC and a big
varicap for the powerup coarse tune. That has issues but at least
shouldn't chirp.

On Sat, 23 Dec 2023 10:04:41 -0800 (PST), Fred Bloggs
<bloggs.fredbloggs.fred@gmail.com> wrote:

>On Friday, December 22, 2023 at 11:00:07?PM UTC-5, John Larkin wrote:
>> NCD2100 is a digital capacitor. We use it in a couple of products to
>> tune an LC oscillator at powerup, to get close to 50 MHz. Then a
>> narrow-pull-range varicap takes over.
>>
>> What happens, when the oscillator starts up, is that the frequency
>> chirps, namely jumps up with a time constant of a couple microseconds.
>> Then it settles down. If we stop it and restart soon, it's right on.
>> But the longer it's off, the bigger chirp we'll get next time it
>> starts. That time constant is milliseconds.
>>
>> This was driving us to drink. There was no explanation. FR4
>> capacitance hook? Thermals, in 2 us? Copper plane eddy currents? Power
>> supplies? Phemt weirdness?
>>
>> After thinking it over, I had a revelation at 3AM.
>>
>> https://www.dropbox.com/scl/fo/aucofxys571v8xt2vu516/h?rlkey=wdvotmfqgk8oxvfhnz2jjylb3&dl=0
>> The Spice model is a conjecture about what's happening inside the
>> chip. A substrate diode is rectifying the AC input and modulating
>> diode and mosfet capacitances. The presumed resistor discharges the
>> rectified DC slowly. Annoying experiments verify the concept.
>>
>> They should have returned that resistor (if it's a real resistor) to
>> VCC/2, not ground.
>>
>> Our posts get reposted and can be googled, so maybe this will help
>> someone.
>>
>> The next board rev will dump the Ixys and use a 16-bit DAC and a big
>> varicap for the powerup coarse tune. That has issues but at least
>> shouldn't chirp.
>
>Sounds like your signal level was too large.

Just under 1 volt p-p, which seems to be within the part spec. At 0.25
p-p, the weirdness goes away. The data sheet is not very chatty.

Vcc=4 and the X1 pin is biased to +2, which doesn't seem to matter.

The big varicap will have a serious tempco, which will require a
tricky algorithm to tame.

On Saturday, December 23, 2023 at 10:56:06 AM UTC-8, John Larkin wrote:
> On Sat, 23 Dec 2023 10:04:41 -0800 (PST), Fred Bloggs
> <bloggs.fred...@gmail.com> wrote:
> >On Friday, December 22, 2023 at 11:00:07?PM UTC-5, John Larkin wrote:
> >> NCD2100 is a digital capacitor. We use it in a couple of products to
> >> tune an LC oscillator at powerup, to get close to 50 MHz. Then a
> >> narrow-pull-range varicap takes over.

....

> The big varicap will have a serious tempco, which will require a
> tricky algorithm to tame.
Or, just a small thermoregulator (thermoelectric and op amp).

On Sat, 23 Dec 2023 11:08:06 -0800 (PST), whit3rd <whit3rd@gmail.com>
wrote:

>On Saturday, December 23, 2023 at 10:56:06?AM UTC-8, John Larkin wrote:
>> On Sat, 23 Dec 2023 10:04:41 -0800 (PST), Fred Bloggs
>> <bloggs.fred...@gmail.com> wrote:
>> >On Friday, December 22, 2023 at 11:00:07?PM UTC-5, John Larkin wrote:
>> >> NCD2100 is a digital capacitor. We use it in a couple of products to
>> >> tune an LC oscillator at powerup, to get close to 50 MHz. Then a
>> >> narrow-pull-range varicap takes over.
>
>...
>
>> The big varicap will have a serious tempco, which will require a
>> tricky algorithm to tame.
>Or, just a small thermoregulator (thermoelectric and op amp).

We already have a thermistor to measure board temp. We'll move it
closer to the varicap (and the other oscillator parts) and do a
software correction into the DAC that drives the big varicap. Software
is free!

We might get a 10:1 improvement in tempco, and something like 4:1
would be tolerable.

Here's a candidate varicap:

There is already a narrow-range varicap that manages phase locking.
The digital cap just centered that at powerup. But we can tune the big
varicap at any time, so when we're running we can gently tweak the big
one to center-up the little one. When not running, we can do open-loop
temperature compensation. The overall algorithm hurts my head, but my
fpga/software guy says sure, that's easy.

On Sat, 23 Dec 2023 11:46:33 -0800, John Larkin <jl@997PotHill.com>
wrote:

>On Sat, 23 Dec 2023 11:08:06 -0800 (PST), whit3rd <whit3rd@gmail.com>
>wrote:
>
>>On Saturday, December 23, 2023 at 10:56:06?AM UTC-8, John Larkin wrote:
>>> On Sat, 23 Dec 2023 10:04:41 -0800 (PST), Fred Bloggs
>>> <bloggs.fred...@gmail.com> wrote:
>>> >On Friday, December 22, 2023 at 11:00:07?PM UTC-5, John Larkin wrote:
>>> >> NCD2100 is a digital capacitor. We use it in a couple of products to
>>> >> tune an LC oscillator at powerup, to get close to 50 MHz. Then a
>>> >> narrow-pull-range varicap takes over.
>>
>>...
>>
>>> The big varicap will have a serious tempco, which will require a
>>> tricky algorithm to tame.
>>Or, just a small thermoregulator (thermoelectric and op amp).
>
>We already have a thermistor to measure board temp. We'll move it
>closer to the varicap (and the other oscillator parts) and do a
>software correction into the DAC that drives the big varicap. Software
>is free!
>
>We might get a 10:1 improvement in tempco, and something like 4:1
>would be tolerable.
>
>Here's a candidate varicap:
>
>
>
>There is already a narrow-range varicap that manages phase locking.
>The digital cap just centered that at powerup. But we can tune the big
>varicap at any time, so when we're running we can gently tweak the big
>one to center-up the little one. When not running, we can do open-loop
>temperature compensation. The overall algorithm hurts my head, but my
>fpga/software guy says sure, that's easy.

Here:

https://www.mouser.com/ProductDetail/Toshiba/1SV281TPH3F?qs=1lrDSlRzNdb9a1JFuKGR3A%3D%3D

Tempco isn't really awful above 3 or 4 volts.