We're designing a biggish dual power supply, and the customer wants
remote sense. We'd add a small D9 connector or something for the four
sense inputs.

This seems non-trivial. The supply should work normally if the rs pins
are not connected. We could put 50 ohm or somesuch resistors from the
main outputs to the rs pins, and then drive a high-z feedback circuit.

If the two supplies are paralleled, the customer would use just two
sense wires.

If rs is connected wrong, the supply can go bonkers or we could fry
the 50 ohm resistors.

Sounds like we need current limiters and maybe diodes and maybe FPGA
logic.

--

If a man will begin with certainties, he shall end with doubts,
but if he will be content to begin with doubts he shall end in certainties.
Francis Bacon

John Larkin wrote:
> We're designing a biggish dual power supply, and the customer wants
> remote sense. We'd add a small D9 connector or something for the four
> sense inputs.
>
> This seems non-trivial. The supply should work normally if the rs pins
> are not connected. We could put 50 ohm or somesuch resistors from the
> main outputs to the rs pins, and then drive a high-z feedback circuit.
>
> If the two supplies are paralleled, the customer would use just two
> sense wires.
>
> If rs is connected wrong, the supply can go bonkers or we could fry
> the 50 ohm resistors.
>
> Sounds like we need current limiters and maybe diodes and maybe FPGA
> logic.
>

The remote sense function is bound to be slowish, so you might just
digitize and do the sanity check in software.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

On Fri, 1 Apr 2022 17:19:58 -0400, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

>John Larkin wrote:
>> We're designing a biggish dual power supply, and the customer wants
>> remote sense. We'd add a small D9 connector or something for the four
>> sense inputs.
>>
>> This seems non-trivial. The supply should work normally if the rs pins
>> are not connected. We could put 50 ohm or somesuch resistors from the
>> main outputs to the rs pins, and then drive a high-z feedback circuit.
>>
>> If the two supplies are paralleled, the customer would use just two
>> sense wires.
>>
>> If rs is connected wrong, the supply can go bonkers or we could fry
>> the 50 ohm resistors.
>>
>> Sounds like we need current limiters and maybe diodes and maybe FPGA
>> logic.
>>
>
>The remote sense function is bound to be slowish, so you might just
>digitize and do the sanity check in software.
>
>Cheers
>
>Phil Hobbs

This is brute force:

https://www.dropbox.com/s/v1yewkd004qvmo5/P941_Rem_Sense_1.jpg?raw=1

I just let the FPGA kids worry about the ugly details.

I resent adding the upper isolated ADC, but it's pretty useful to
detect gross mistakes and shut things down. I guess there could be
other ways to do that.

The current limiters need to be wimpy enough that they don't push big
errors into the remote sense wiring, but low enough that the ADC
loading is small. Depletion fets maybe. Possibly power resistors.

--

If a man will begin with certainties, he shall end with doubts,
but if he will be content to begin with doubts he shall end in certainties.
Francis Bacon

John Larkin <jlarkin@highland_atwork_technology.com> wrote:
> We're designing a biggish dual power supply, and the customer wants
> remote sense. We'd add a small D9 connector or something for the four
> sense inputs.
>
> This seems non-trivial. The supply should work normally if the rs pins
> are not connected. We could put 50 ohm or somesuch resistors from the
> main outputs to the rs pins, and then drive a high-z feedback circuit.
>
> If the two supplies are paralleled, the customer would use just two
> sense wires.
>
> If rs is connected wrong, the supply can go bonkers or we could fry
> the 50 ohm resistors.
>
> Sounds like we need current limiters and maybe diodes and maybe FPGA
> logic.
>

Why FPGA? Why not some uC?
--
Uwe Bonnes bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt
--------- Tel. 06151 1623569 ------- Fax. 06151 1623305 ---------

On Fri, 01 Apr 2022 14:49:18 -0700, John Larkin
<jlarkin@highland_atwork_technology.com> wrote:

>On Fri, 1 Apr 2022 17:19:58 -0400, Phil Hobbs
><pcdhSpamMeSenseless@electrooptical.net> wrote:
>
>>John Larkin wrote:
>>> We're designing a biggish dual power supply, and the customer wants
>>> remote sense. We'd add a small D9 connector or something for the four
>>> sense inputs.
>>>
>>> This seems non-trivial. The supply should work normally if the rs pins
>>> are not connected. We could put 50 ohm or somesuch resistors from the
>>> main outputs to the rs pins, and then drive a high-z feedback circuit.
>>>
>>> If the two supplies are paralleled, the customer would use just two
>>> sense wires.
>>>
>>> If rs is connected wrong, the supply can go bonkers or we could fry
>>> the 50 ohm resistors.
>>>
>>> Sounds like we need current limiters and maybe diodes and maybe FPGA
>>> logic.
>>>
>>
>>The remote sense function is bound to be slowish, so you might just
>>digitize and do the sanity check in software.
>>
>>Cheers
>>
>>Phil Hobbs
>
>This is brute force:
>
>https://www.dropbox.com/s/v1yewkd004qvmo5/P941_Rem_Sense_1.jpg?raw=1
>
>I just let the FPGA kids worry about the ugly details.
>
>I resent adding the upper isolated ADC, but it's pretty useful to
>detect gross mistakes and shut things down. I guess there could be
>other ways to do that.
>
>The current limiters need to be wimpy enough that they don't push big
>errors into the remote sense wiring, but low enough that the ADC
>loading is small. Depletion fets maybe. Possibly power resistors.

I could dump the upper ADC and sense voltage drop across the current
limiters as the sense connection fault condition.

https://www.dropbox.com/s/ocgnndkafawx9gu/P941_Rem_Sense_2.jpg?raw=1

That ain't bad. Users would have to keep their wiring drops below
about 1 volt, which isn't unreasonable.

--

If a man will begin with certainties, he shall end with doubts,
but if he will be content to begin with doubts he shall end in certainties.
Francis Bacon

On 1 Apr 2022 22:28:41 GMT, Uwe Bonnes
<bon@hertz.ikp.physik.tu-darmstadt.de> wrote:

>John Larkin <jlarkin@highland_atwork_technology.com> wrote:
>> We're designing a biggish dual power supply, and the customer wants
>> remote sense. We'd add a small D9 connector or something for the four
>> sense inputs.
>>
>> This seems non-trivial. The supply should work normally if the rs pins
>> are not connected. We could put 50 ohm or somesuch resistors from the
>> main outputs to the rs pins, and then drive a high-z feedback circuit.
>>
>> If the two supplies are paralleled, the customer would use just two
>> sense wires.
>>
>> If rs is connected wrong, the supply can go bonkers or we could fry
>> the 50 ohm resistors.
>>
>> Sounds like we need current limiters and maybe diodes and maybe FPGA
>> logic.
>>
>
>Why FPGA? Why not some uC?

Every plugin board in this box has an FPGA. We need to do a lot of
signal processing. The isolated ADCs are ADUM7703 delta-sigmas with a
20 MHz bit rate, which need a heap of decimation processing. We'll do
some 100 Mbit communications with the motherboard too.

The little Trion FPGAs are about $10. We could even run a riscV
processor inside.

--

If a man will begin with certainties, he shall end with doubts,
but if he will be content to begin with doubts he shall end in certainties.
Francis Bacon

On Friday, April 1, 2022 at 10:37:23 PM UTC, John Larkin wrote:

" The supply should work normally if the rs pins
are not connected."

That, as written, worries me a bit. Its a bit vague, certain too
vague to tell the customer, IMHO. Let's say by "connected"
we really mean "the customer has taken steps to make the physical
connections", therefore presumably the electrical connection
as well. So I would insist the customer use your sense cable
assembly (under terms of warranty); and your sense cable assembly
has either a simple loop-back connection or positive-action
mechanism that tells the FPGA/uP "the customer is correctly
using this sense cable" and power may be delivered.

lørdag den 2. april 2022 kl. 07.03.16 UTC+2 skrev Rich S:
> On Friday, April 1, 2022 at 10:37:23 PM UTC, John Larkin wrote:
>
> " The supply should work normally if the rs pins
> are not connected."
> That, as written, worries me a bit. Its a bit vague, certain too
> vague to tell the customer, IMHO. Let's say by "connected"
> we really mean "the customer has taken steps to make the physical
> connections", therefore presumably the electrical connection
> as well. So I would insist the customer use your sense cable
> assembly (under terms of warranty); and your sense cable assembly
> has either a simple loop-back connection or positive-action
> mechanism that tells the FPGA/uP "the customer is correctly
> using this sense cable" and power may be delivered.

I'd take it as; the supply should output the correct voltage (just with no compensation)
if you don't connect the sense wires, just like any lab supply with remote sense

resistors from output to sense takes care of that, but they need protection in
case the output wires gets disconnected or the sense wires are shorted or connected in reverse

a sense cable assembly won't protect against bad connections or wire damages

On Fri, 01 Apr 2022 13:38:41 -0700, John Larkin
<jlarkin@highland_atwork_technology.com> wrote:

>We're designing a biggish dual power supply, and the customer wants
>remote sense. We'd add a small D9 connector or something for the four
>sense inputs.
>
>This seems non-trivial. The supply should work normally if the rs pins
>are not connected. We could put 50 ohm or somesuch resistors from the
>main outputs to the rs pins, and then drive a high-z feedback circuit.
>
>If the two supplies are paralleled, the customer would use just two
>sense wires.
>
>If rs is connected wrong, the supply can go bonkers or we could fry
>the 50 ohm resistors.
>
>Sounds like we need current limiters and maybe diodes and maybe FPGA
>logic.

For single-fault abnormals, you'd best resort to a power or logic
crowbar/OVP, sensing main terminals. The sense linkage to the rail
closest to reference ground may need a diode bypass to that rail.
That linkage also has a lower R limit, for transient response.

Paralleling is a separate issue.

RL

On Fri, 1 Apr 2022 22:03:12 -0700 (PDT), Rich S
<richsulinengineer@gmail.com> wrote:

>On Friday, April 1, 2022 at 10:37:23 PM UTC, John Larkin wrote:
>
>" The supply should work normally if the rs pins
>are not connected."
>
>That, as written, worries me a bit. Its a bit vague, certain too
>vague to tell the customer, IMHO.

Sounds pretty obvious to me. Don't use remote sense and it works like
a simple power supply.

Let's say by "connected"
>we really mean "the customer has taken steps to make the physical
>connections", therefore presumably the electrical connection
>as well. So I would insist the customer use your sense cable
>assembly (under terms of warranty); and your sense cable assembly
>has either a simple loop-back connection or positive-action
>mechanism that tells the FPGA/uP "the customer is correctly
>using this sense cable" and power may be delivered.

Remote sense power supplies are common. People seem to use them OK. I
don't know if rs power supplies have any sorts of protections against
wiring errors. I think some just have 50 ohm resistors from outputs to
the sense pins. I posted to see what people know about that.

My customers make long custom cables with exotic MIL connectors. I
sure don't want to do that for them.

I just want to be sure that nothing nasty happens if the rs
connections are made wrong. We'd just shut down for a second or two
and retry, and blink a red LED during the shutdown.

--

I yam what I yam - Popeye

On 4/2/2022 1:37, John Larkin wrote:
> On 1 Apr 2022 22:28:41 GMT, Uwe Bonnes
> <bon@hertz.ikp.physik.tu-darmstadt.de> wrote:
>
>> John Larkin <jlarkin@highland_atwork_technology.com> wrote:
>>> We're designing a biggish dual power supply, and the customer wants
>>> remote sense. We'd add a small D9 connector or something for the four
>>> sense inputs.
>>>
>>> This seems non-trivial. The supply should work normally if the rs pins
>>> are not connected. We could put 50 ohm or somesuch resistors from the
>>> main outputs to the rs pins, and then drive a high-z feedback circuit.
>>>
>>> If the two supplies are paralleled, the customer would use just two
>>> sense wires.
>>>
>>> If rs is connected wrong, the supply can go bonkers or we could fry
>>> the 50 ohm resistors.
>>>
>>> Sounds like we need current limiters and maybe diodes and maybe FPGA
>>> logic.
>>>
>>
>> Why FPGA? Why not some uC?
>
> Every plugin board in this box has an FPGA. We need to do a lot of
> signal processing. The isolated ADCs are ADUM7703 delta-sigmas with a
> 20 MHz bit rate, which need a heap of decimation processing. We'll do
> some 100 Mbit communications with the motherboard too.
>
> The little Trion FPGAs are about $10. We could even run a riscV
> processor inside.
>

Thanks for mentioning these Trion FPGA-s, they look very interesting
to me.
Do you have any impression on their software licensing? I saw they
sell it at $35 but does it turn into yet another subscription
after some time?

On Sat, 2 Apr 2022 18:54:50 +0300, Dimiter_Popoff <dp@tgi-sci.com>
wrote:

>On 4/2/2022 1:37, John Larkin wrote:
>> On 1 Apr 2022 22:28:41 GMT, Uwe Bonnes
>> <bon@hertz.ikp.physik.tu-darmstadt.de> wrote:
>>
>>> John Larkin <jlarkin@highland_atwork_technology.com> wrote:
>>>> We're designing a biggish dual power supply, and the customer wants
>>>> remote sense. We'd add a small D9 connector or something for the four
>>>> sense inputs.
>>>>
>>>> This seems non-trivial. The supply should work normally if the rs pins
>>>> are not connected. We could put 50 ohm or somesuch resistors from the
>>>> main outputs to the rs pins, and then drive a high-z feedback circuit.
>>>>
>>>> If the two supplies are paralleled, the customer would use just two
>>>> sense wires.
>>>>
>>>> If rs is connected wrong, the supply can go bonkers or we could fry
>>>> the 50 ohm resistors.
>>>>
>>>> Sounds like we need current limiters and maybe diodes and maybe FPGA
>>>> logic.
>>>>
>>>
>>> Why FPGA? Why not some uC?
>>
>> Every plugin board in this box has an FPGA. We need to do a lot of
>> signal processing. The isolated ADCs are ADUM7703 delta-sigmas with a
>> 20 MHz bit rate, which need a heap of decimation processing. We'll do
>> some 100 Mbit communications with the motherboard too.
>>
>> The little Trion FPGAs are about $10. We could even run a riscV
>> processor inside.
>>
>
>Thanks for mentioning these Trion FPGA-s, they look very interesting
>to me.
>Do you have any impression on their software licensing? I saw they
>sell it at $35 but does it turn into yet another subscription
>after some time?

I'll ask my FPGA guy. I get the impression that it's not bad.

They look cool. They are simple, with no ADC or high-end serdes or
things like that. They do have a dram controller (I think), lvds i/o,
schmitts, and a soft core riscV. 1Mbit of sram.

We're about to make a test board that includes the T20F256C4. We plan
to measure a lot of stuff: pin-pin delays, Fmax on counters, LVDS
common-mode levels, delay-vs-Vcore and temperature, jitter, drive
strengths, things like that.

We asked their support people about some details of using the LVDS
receivers at other levels, and they said "don't do that."

I might make an ADC using an LVDS receiver as a comparator. The
minimal ADC would use three fpga pins and one external RC. That could
be v-to-f, pwm, delta-sigma, or single-slope. Fun.

We've designed a flash manager with bootstrap and field upgrade and
such.

--

If a man will begin with certainties, he shall end with doubts,
but if he will be content to begin with doubts he shall end in certainties.
Francis Bacon

On 4/2/2022 19:52, John Larkin wrote:
> On Sat, 2 Apr 2022 18:54:50 +0300, Dimiter_Popoff <dp@tgi-sci.com>
> wrote:
>
>> On 4/2/2022 1:37, John Larkin wrote:
>>> On 1 Apr 2022 22:28:41 GMT, Uwe Bonnes
>>> <bon@hertz.ikp.physik.tu-darmstadt.de> wrote:
>>>
>>>> John Larkin <jlarkin@highland_atwork_technology.com> wrote:
>>>>> We're designing a biggish dual power supply, and the customer wants
>>>>> remote sense. We'd add a small D9 connector or something for the four
>>>>> sense inputs.
>>>>>
>>>>> This seems non-trivial. The supply should work normally if the rs pins
>>>>> are not connected. We could put 50 ohm or somesuch resistors from the
>>>>> main outputs to the rs pins, and then drive a high-z feedback circuit.
>>>>>
>>>>> If the two supplies are paralleled, the customer would use just two
>>>>> sense wires.
>>>>>
>>>>> If rs is connected wrong, the supply can go bonkers or we could fry
>>>>> the 50 ohm resistors.
>>>>>
>>>>> Sounds like we need current limiters and maybe diodes and maybe FPGA
>>>>> logic.
>>>>>
>>>>
>>>> Why FPGA? Why not some uC?
>>>
>>> Every plugin board in this box has an FPGA. We need to do a lot of
>>> signal processing. The isolated ADCs are ADUM7703 delta-sigmas with a
>>> 20 MHz bit rate, which need a heap of decimation processing. We'll do
>>> some 100 Mbit communications with the motherboard too.
>>>
>>> The little Trion FPGAs are about $10. We could even run a riscV
>>> processor inside.
>>>
>>
>> Thanks for mentioning these Trion FPGA-s, they look very interesting
>> to me.
>> Do you have any impression on their software licensing? I saw they
>> sell it at $35 but does it turn into yet another subscription
>> after some time?
>
> I'll ask my FPGA guy. I get the impression that it's not bad.
>
> They look cool. They are simple, with no ADC or high-end serdes or
> things like that. They do have a dram controller (I think), lvds i/o,
> schmitts, and a soft core riscV. 1Mbit of sram.
>
> We're about to make a test board that includes the T20F256C4. We plan
> to measure a lot of stuff: pin-pin delays, Fmax on counters, LVDS
> common-mode levels, delay-vs-Vcore and temperature, jitter, drive
> strengths, things like that.
>
> We asked their support people about some details of using the LVDS
> receivers at other levels, and they said "don't do that."
>
> I might make an ADC using an LVDS receiver as a comparator. The
> minimal ADC would use three fpga pins and one external RC. That could
> be v-to-f, pwm, delta-sigma, or single-slope. Fun.
>
> We've designed a flash manager with bootstrap and field upgrade and
> such.
>

I am only after standard functions, and if their lvds will do for
hdmi video out I'll be happy.
What I feel nervous about are their design tools, looks like they
are just $35 for now but how quickly can they become prohibitive
for someone who does not sell millions of units.

On Sat, 2 Apr 2022 20:33:11 +0300, Dimiter_Popoff <dp@tgi-sci.com>
wrote:

>On 4/2/2022 19:52, John Larkin wrote:
>> On Sat, 2 Apr 2022 18:54:50 +0300, Dimiter_Popoff <dp@tgi-sci.com>
>> wrote:
>>
>>> On 4/2/2022 1:37, John Larkin wrote:
>>>> On 1 Apr 2022 22:28:41 GMT, Uwe Bonnes
>>>> <bon@hertz.ikp.physik.tu-darmstadt.de> wrote:
>>>>
>>>>> John Larkin <jlarkin@highland_atwork_technology.com> wrote:
>>>>>> We're designing a biggish dual power supply, and the customer wants
>>>>>> remote sense. We'd add a small D9 connector or something for the four
>>>>>> sense inputs.
>>>>>>
>>>>>> This seems non-trivial. The supply should work normally if the rs pins
>>>>>> are not connected. We could put 50 ohm or somesuch resistors from the
>>>>>> main outputs to the rs pins, and then drive a high-z feedback circuit.
>>>>>>
>>>>>> If the two supplies are paralleled, the customer would use just two
>>>>>> sense wires.
>>>>>>
>>>>>> If rs is connected wrong, the supply can go bonkers or we could fry
>>>>>> the 50 ohm resistors.
>>>>>>
>>>>>> Sounds like we need current limiters and maybe diodes and maybe FPGA
>>>>>> logic.
>>>>>>
>>>>>
>>>>> Why FPGA? Why not some uC?
>>>>
>>>> Every plugin board in this box has an FPGA. We need to do a lot of
>>>> signal processing. The isolated ADCs are ADUM7703 delta-sigmas with a
>>>> 20 MHz bit rate, which need a heap of decimation processing. We'll do
>>>> some 100 Mbit communications with the motherboard too.
>>>>
>>>> The little Trion FPGAs are about $10. We could even run a riscV
>>>> processor inside.
>>>>
>>>
>>> Thanks for mentioning these Trion FPGA-s, they look very interesting
>>> to me.
>>> Do you have any impression on their software licensing? I saw they
>>> sell it at $35 but does it turn into yet another subscription
>>> after some time?
>>
>> I'll ask my FPGA guy. I get the impression that it's not bad.
>>
>> They look cool. They are simple, with no ADC or high-end serdes or
>> things like that. They do have a dram controller (I think), lvds i/o,
>> schmitts, and a soft core riscV. 1Mbit of sram.
>>
>> We're about to make a test board that includes the T20F256C4. We plan
>> to measure a lot of stuff: pin-pin delays, Fmax on counters, LVDS
>> common-mode levels, delay-vs-Vcore and temperature, jitter, drive
>> strengths, things like that.
>>
>> We asked their support people about some details of using the LVDS
>> receivers at other levels, and they said "don't do that."
>>
>> I might make an ADC using an LVDS receiver as a comparator. The
>> minimal ADC would use three fpga pins and one external RC. That could
>> be v-to-f, pwm, delta-sigma, or single-slope. Fun.
>>
>> We've designed a flash manager with bootstrap and field upgrade and
>> such.
>>
>
>I am only after standard functions, and if their lvds will do for
>hdmi video out I'll be happy.
>What I feel nervous about are their design tools, looks like they
>are just $35 for now but how quickly can they become prohibitive
>for someone who does not sell millions of units.

I never understood why FPGA vendors should charge for tools or use
insane licensing stuff. Makes more sense to just give it away, maybe
charge for support.

--

If a man will begin with certainties, he shall end with doubts,
but if he will be content to begin with doubts he shall end in certainties.
Francis Bacon

On 4/2/2022 20:47, John Larkin wrote:
> On Sat, 2 Apr 2022 20:33:11 +0300, Dimiter_Popoff <dp@tgi-sci.com>
> wrote:
>
>> On 4/2/2022 19:52, John Larkin wrote:
>>> On Sat, 2 Apr 2022 18:54:50 +0300, Dimiter_Popoff <dp@tgi-sci.com>
>>> wrote:
>>>
>>>> On 4/2/2022 1:37, John Larkin wrote:
>>>>> On 1 Apr 2022 22:28:41 GMT, Uwe Bonnes
>>>>> <bon@hertz.ikp.physik.tu-darmstadt.de> wrote:
>>>>>
>>>>>> John Larkin <jlarkin@highland_atwork_technology.com> wrote:
>>>>>>> We're designing a biggish dual power supply, and the customer wants
>>>>>>> remote sense. We'd add a small D9 connector or something for the four
>>>>>>> sense inputs.
>>>>>>>
>>>>>>> This seems non-trivial. The supply should work normally if the rs pins
>>>>>>> are not connected. We could put 50 ohm or somesuch resistors from the
>>>>>>> main outputs to the rs pins, and then drive a high-z feedback circuit.
>>>>>>>
>>>>>>> If the two supplies are paralleled, the customer would use just two
>>>>>>> sense wires.
>>>>>>>
>>>>>>> If rs is connected wrong, the supply can go bonkers or we could fry
>>>>>>> the 50 ohm resistors.
>>>>>>>
>>>>>>> Sounds like we need current limiters and maybe diodes and maybe FPGA
>>>>>>> logic.
>>>>>>>
>>>>>>
>>>>>> Why FPGA? Why not some uC?
>>>>>
>>>>> Every plugin board in this box has an FPGA. We need to do a lot of
>>>>> signal processing. The isolated ADCs are ADUM7703 delta-sigmas with a
>>>>> 20 MHz bit rate, which need a heap of decimation processing. We'll do
>>>>> some 100 Mbit communications with the motherboard too.
>>>>>
>>>>> The little Trion FPGAs are about $10. We could even run a riscV
>>>>> processor inside.
>>>>>
>>>>
>>>> Thanks for mentioning these Trion FPGA-s, they look very interesting
>>>> to me.
>>>> Do you have any impression on their software licensing? I saw they
>>>> sell it at $35 but does it turn into yet another subscription
>>>> after some time?
>>>
>>> I'll ask my FPGA guy. I get the impression that it's not bad.
>>>
>>> They look cool. They are simple, with no ADC or high-end serdes or
>>> things like that. They do have a dram controller (I think), lvds i/o,
>>> schmitts, and a soft core riscV. 1Mbit of sram.
>>>
>>> We're about to make a test board that includes the T20F256C4. We plan
>>> to measure a lot of stuff: pin-pin delays, Fmax on counters, LVDS
>>> common-mode levels, delay-vs-Vcore and temperature, jitter, drive
>>> strengths, things like that.
>>>
>>> We asked their support people about some details of using the LVDS
>>> receivers at other levels, and they said "don't do that."
>>>
>>> I might make an ADC using an LVDS receiver as a comparator. The
>>> minimal ADC would use three fpga pins and one external RC. That could
>>> be v-to-f, pwm, delta-sigma, or single-slope. Fun.
>>>
>>> We've designed a flash manager with bootstrap and field upgrade and
>>> such.
>>>
>>
>> I am only after standard functions, and if their lvds will do for
>> hdmi video out I'll be happy.
>> What I feel nervous about are their design tools, looks like they
>> are just $35 for now but how quickly can they become prohibitive
>> for someone who does not sell millions of units.
>
> I never understood why FPGA vendors should charge for tools or use
> insane licensing stuff. Makes more sense to just give it away, maybe
> charge for support.
>

For many years - >20 - the electronica industry has been closing things
down so only "politburo members" can do real development. Probably this
is part of the same effort, FPGA vendors are interested in selling more
chips but their large customers likely give them contracts against
guarantees the tools will not be available to everybody.

I wonder if the $35 tool one can buy now will work on a PC with
no internet connection. Guess I have only one way to know for sure.

On Sat, 2 Apr 2022 21:38:30 +0300, Dimiter_Popoff <dp@tgi-sci.com>
wrote:

>On 4/2/2022 20:47, John Larkin wrote:
>> On Sat, 2 Apr 2022 20:33:11 +0300, Dimiter_Popoff <dp@tgi-sci.com>
>> wrote:
>>
>>> On 4/2/2022 19:52, John Larkin wrote:
>>>> On Sat, 2 Apr 2022 18:54:50 +0300, Dimiter_Popoff <dp@tgi-sci.com>
>>>> wrote:
>>>>
>>>>> On 4/2/2022 1:37, John Larkin wrote:
>>>>>> On 1 Apr 2022 22:28:41 GMT, Uwe Bonnes
>>>>>> <bon@hertz.ikp.physik.tu-darmstadt.de> wrote:
>>>>>>
>>>>>>> John Larkin <jlarkin@highland_atwork_technology.com> wrote:
>>>>>>>> We're designing a biggish dual power supply, and the customer wants
>>>>>>>> remote sense. We'd add a small D9 connector or something for the four
>>>>>>>> sense inputs.
>>>>>>>>
>>>>>>>> This seems non-trivial. The supply should work normally if the rs pins
>>>>>>>> are not connected. We could put 50 ohm or somesuch resistors from the
>>>>>>>> main outputs to the rs pins, and then drive a high-z feedback circuit.
>>>>>>>>
>>>>>>>> If the two supplies are paralleled, the customer would use just two
>>>>>>>> sense wires.
>>>>>>>>
>>>>>>>> If rs is connected wrong, the supply can go bonkers or we could fry
>>>>>>>> the 50 ohm resistors.
>>>>>>>>
>>>>>>>> Sounds like we need current limiters and maybe diodes and maybe FPGA
>>>>>>>> logic.
>>>>>>>>
>>>>>>>
>>>>>>> Why FPGA? Why not some uC?
>>>>>>
>>>>>> Every plugin board in this box has an FPGA. We need to do a lot of
>>>>>> signal processing. The isolated ADCs are ADUM7703 delta-sigmas with a
>>>>>> 20 MHz bit rate, which need a heap of decimation processing. We'll do
>>>>>> some 100 Mbit communications with the motherboard too.
>>>>>>
>>>>>> The little Trion FPGAs are about $10. We could even run a riscV
>>>>>> processor inside.
>>>>>>
>>>>>
>>>>> Thanks for mentioning these Trion FPGA-s, they look very interesting
>>>>> to me.
>>>>> Do you have any impression on their software licensing? I saw they
>>>>> sell it at $35 but does it turn into yet another subscription
>>>>> after some time?
>>>>
>>>> I'll ask my FPGA guy. I get the impression that it's not bad.
>>>>
>>>> They look cool. They are simple, with no ADC or high-end serdes or
>>>> things like that. They do have a dram controller (I think), lvds i/o,
>>>> schmitts, and a soft core riscV. 1Mbit of sram.
>>>>
>>>> We're about to make a test board that includes the T20F256C4. We plan
>>>> to measure a lot of stuff: pin-pin delays, Fmax on counters, LVDS
>>>> common-mode levels, delay-vs-Vcore and temperature, jitter, drive
>>>> strengths, things like that.
>>>>
>>>> We asked their support people about some details of using the LVDS
>>>> receivers at other levels, and they said "don't do that."
>>>>
>>>> I might make an ADC using an LVDS receiver as a comparator. The
>>>> minimal ADC would use three fpga pins and one external RC. That could
>>>> be v-to-f, pwm, delta-sigma, or single-slope. Fun.
>>>>
>>>> We've designed a flash manager with bootstrap and field upgrade and
>>>> such.
>>>>
>>>
>>> I am only after standard functions, and if their lvds will do for
>>> hdmi video out I'll be happy.
>>> What I feel nervous about are their design tools, looks like they
>>> are just $35 for now but how quickly can they become prohibitive
>>> for someone who does not sell millions of units.
>>
>> I never understood why FPGA vendors should charge for tools or use
>> insane licensing stuff. Makes more sense to just give it away, maybe
>> charge for support.
>>
>
>For many years - >20 - the electronica industry has been closing things
>down so only "politburo members" can do real development. Probably this
>is part of the same effort, FPGA vendors are interested in selling more
>chips but their large customers likely give them contracts against
>guarantees the tools will not be available to everybody.

I'd bet it's an attempt to lock their customers in forever.

A have MS Word 2016. Now MS Updater nags me to convert to Word365,
which is only by subscription. Strangely, Word 2016 is now developing
problems.

>I wonder if the $35 tool one can buy now will work on a PC with
>no internet connection. Guess I have only one way to know for sure.

Very good question. And companies who want to protect their critical
computers and networks from ransomware attacks et al may well have an
air-gapped system.

Joe Gwinn

On 4/2/2022 21:51, Joe Gwinn wrote:
> On Sat, 2 Apr 2022 21:38:30 +0300, Dimiter_Popoff <dp@tgi-sci.com>
> wrote:
>
>> On 4/2/2022 20:47, John Larkin wrote:
>>> On Sat, 2 Apr 2022 20:33:11 +0300, Dimiter_Popoff <dp@tgi-sci.com>
>>> wrote:
>>>
>>>> On 4/2/2022 19:52, John Larkin wrote:
>>>>> On Sat, 2 Apr 2022 18:54:50 +0300, Dimiter_Popoff <dp@tgi-sci.com>
>>>>> wrote:
>>>>>
>>>>>> On 4/2/2022 1:37, John Larkin wrote:
>>>>>>> On 1 Apr 2022 22:28:41 GMT, Uwe Bonnes
>>>>>>> <bon@hertz.ikp.physik.tu-darmstadt.de> wrote:
>>>>>>>
>>>>>>>> John Larkin <jlarkin@highland_atwork_technology.com> wrote:
>>>>>>>>> We're designing a biggish dual power supply, and the customer wants
>>>>>>>>> remote sense. We'd add a small D9 connector or something for the four
>>>>>>>>> sense inputs.
>>>>>>>>>
>>>>>>>>> This seems non-trivial. The supply should work normally if the rs pins
>>>>>>>>> are not connected. We could put 50 ohm or somesuch resistors from the
>>>>>>>>> main outputs to the rs pins, and then drive a high-z feedback circuit.
>>>>>>>>>
>>>>>>>>> If the two supplies are paralleled, the customer would use just two
>>>>>>>>> sense wires.
>>>>>>>>>
>>>>>>>>> If rs is connected wrong, the supply can go bonkers or we could fry
>>>>>>>>> the 50 ohm resistors.
>>>>>>>>>
>>>>>>>>> Sounds like we need current limiters and maybe diodes and maybe FPGA
>>>>>>>>> logic.
>>>>>>>>>
>>>>>>>>
>>>>>>>> Why FPGA? Why not some uC?
>>>>>>>
>>>>>>> Every plugin board in this box has an FPGA. We need to do a lot of
>>>>>>> signal processing. The isolated ADCs are ADUM7703 delta-sigmas with a
>>>>>>> 20 MHz bit rate, which need a heap of decimation processing. We'll do
>>>>>>> some 100 Mbit communications with the motherboard too.
>>>>>>>
>>>>>>> The little Trion FPGAs are about $10. We could even run a riscV
>>>>>>> processor inside.
>>>>>>>
>>>>>>
>>>>>> Thanks for mentioning these Trion FPGA-s, they look very interesting
>>>>>> to me.
>>>>>> Do you have any impression on their software licensing? I saw they
>>>>>> sell it at $35 but does it turn into yet another subscription
>>>>>> after some time?
>>>>>
>>>>> I'll ask my FPGA guy. I get the impression that it's not bad.
>>>>>
>>>>> They look cool. They are simple, with no ADC or high-end serdes or
>>>>> things like that. They do have a dram controller (I think), lvds i/o,
>>>>> schmitts, and a soft core riscV. 1Mbit of sram.
>>>>>
>>>>> We're about to make a test board that includes the T20F256C4. We plan
>>>>> to measure a lot of stuff: pin-pin delays, Fmax on counters, LVDS
>>>>> common-mode levels, delay-vs-Vcore and temperature, jitter, drive
>>>>> strengths, things like that.
>>>>>
>>>>> We asked their support people about some details of using the LVDS
>>>>> receivers at other levels, and they said "don't do that."
>>>>>
>>>>> I might make an ADC using an LVDS receiver as a comparator. The
>>>>> minimal ADC would use three fpga pins and one external RC. That could
>>>>> be v-to-f, pwm, delta-sigma, or single-slope. Fun.
>>>>>
>>>>> We've designed a flash manager with bootstrap and field upgrade and
>>>>> such.
>>>>>
>>>>
>>>> I am only after standard functions, and if their lvds will do for
>>>> hdmi video out I'll be happy.
>>>> What I feel nervous about are their design tools, looks like they
>>>> are just $35 for now but how quickly can they become prohibitive
>>>> for someone who does not sell millions of units.
>>>
>>> I never understood why FPGA vendors should charge for tools or use
>>> insane licensing stuff. Makes more sense to just give it away, maybe
>>> charge for support.
>>>
>>
>> For many years - >20 - the electronica industry has been closing things
>> down so only "politburo members" can do real development. Probably this
>> is part of the same effort, FPGA vendors are interested in selling more
>> chips but their large customers likely give them contracts against
>> guarantees the tools will not be available to everybody.
>
> I'd bet it's an attempt to lock their customers in forever.

Could be if it is a one time fee. Not sure what is in at the moment.
But it started a long time ago so it is more likely to be the work
of some 'visionary' to prevent the spread of knowledge which would
cost them zillions. Look at how they closed down all things wifi,
the first - prism or something - was documented etc. until it got
bought out and hidden from there on. Even T10 started selling their
documents many years ago... So far the rfc-s are not hidden, but for
how long. Some Sauron seems to be be lurking in the shadows :-).

>
> A have MS Word 2016. Now MS Updater nags me to convert to Word365,
> which is only by subscription. Strangely, Word 2016 is now developing
> problems.
>
>
>> I wonder if the $35 tool one can buy now will work on a PC with
>> no internet connection. Guess I have only one way to know for sure.
>
> Very good question. And companies who want to protect their critical
> computers and networks from ransomware attacks et al may well have an
> air-gapped system.

I am not concerned about our design critical stuff, it is all under
dps. They got a foot in when xilinx bought the coolrunner some 20 years
ago, we had a logic compiler I had written; the cpld-s we have now
use an old xilinx tool, old enough to work with no internet.

Guess I'll try some of these (too?) new fpga-s out, once I have a
working logic as I need it I typically don't need to change it for
many years. They seem new enough to be yet preoccupied with how
to change one time sales into subscription, guess we'll see.
Their fpga-s look really good on paper for what I am after.

On Sat, 2 Apr 2022 22:15:00 +0300, Dimiter_Popoff <dp@tgi-sci.com>
wrote:

>On 4/2/2022 21:51, Joe Gwinn wrote:
>> On Sat, 2 Apr 2022 21:38:30 +0300, Dimiter_Popoff <dp@tgi-sci.com>
>> wrote:
>>
>>> On 4/2/2022 20:47, John Larkin wrote:
>>>> On Sat, 2 Apr 2022 20:33:11 +0300, Dimiter_Popoff <dp@tgi-sci.com>
>>>> wrote:
>>>>
>>>>> On 4/2/2022 19:52, John Larkin wrote:
>>>>>> On Sat, 2 Apr 2022 18:54:50 +0300, Dimiter_Popoff <dp@tgi-sci.com>
>>>>>> wrote:
>>>>>>
>>>>>>> On 4/2/2022 1:37, John Larkin wrote:
>>>>>>>> On 1 Apr 2022 22:28:41 GMT, Uwe Bonnes
>>>>>>>> <bon@hertz.ikp.physik.tu-darmstadt.de> wrote:
>>>>>>>>
>>>>>>>>> John Larkin <jlarkin@highland_atwork_technology.com> wrote:
>>>>>>>>>> We're designing a biggish dual power supply, and the customer wants
>>>>>>>>>> remote sense. We'd add a small D9 connector or something for the four
>>>>>>>>>> sense inputs.
>>>>>>>>>>
>>>>>>>>>> This seems non-trivial. The supply should work normally if the rs pins
>>>>>>>>>> are not connected. We could put 50 ohm or somesuch resistors from the
>>>>>>>>>> main outputs to the rs pins, and then drive a high-z feedback circuit.
>>>>>>>>>>
>>>>>>>>>> If the two supplies are paralleled, the customer would use just two
>>>>>>>>>> sense wires.
>>>>>>>>>>
>>>>>>>>>> If rs is connected wrong, the supply can go bonkers or we could fry
>>>>>>>>>> the 50 ohm resistors.
>>>>>>>>>>
>>>>>>>>>> Sounds like we need current limiters and maybe diodes and maybe FPGA
>>>>>>>>>> logic.
>>>>>>>>>>
>>>>>>>>>
>>>>>>>>> Why FPGA? Why not some uC?
>>>>>>>>
>>>>>>>> Every plugin board in this box has an FPGA. We need to do a lot of
>>>>>>>> signal processing. The isolated ADCs are ADUM7703 delta-sigmas with a
>>>>>>>> 20 MHz bit rate, which need a heap of decimation processing. We'll do
>>>>>>>> some 100 Mbit communications with the motherboard too.
>>>>>>>>
>>>>>>>> The little Trion FPGAs are about $10. We could even run a riscV
>>>>>>>> processor inside.
>>>>>>>>
>>>>>>>
>>>>>>> Thanks for mentioning these Trion FPGA-s, they look very interesting
>>>>>>> to me.
>>>>>>> Do you have any impression on their software licensing? I saw they
>>>>>>> sell it at $35 but does it turn into yet another subscription
>>>>>>> after some time?
>>>>>>
>>>>>> I'll ask my FPGA guy. I get the impression that it's not bad.
>>>>>>
>>>>>> They look cool. They are simple, with no ADC or high-end serdes or
>>>>>> things like that. They do have a dram controller (I think), lvds i/o,
>>>>>> schmitts, and a soft core riscV. 1Mbit of sram.
>>>>>>
>>>>>> We're about to make a test board that includes the T20F256C4. We plan
>>>>>> to measure a lot of stuff: pin-pin delays, Fmax on counters, LVDS
>>>>>> common-mode levels, delay-vs-Vcore and temperature, jitter, drive
>>>>>> strengths, things like that.
>>>>>>
>>>>>> We asked their support people about some details of using the LVDS
>>>>>> receivers at other levels, and they said "don't do that."
>>>>>>
>>>>>> I might make an ADC using an LVDS receiver as a comparator. The
>>>>>> minimal ADC would use three fpga pins and one external RC. That could
>>>>>> be v-to-f, pwm, delta-sigma, or single-slope. Fun.
>>>>>>
>>>>>> We've designed a flash manager with bootstrap and field upgrade and
>>>>>> such.
>>>>>>
>>>>>
>>>>> I am only after standard functions, and if their lvds will do for
>>>>> hdmi video out I'll be happy.
>>>>> What I feel nervous about are their design tools, looks like they
>>>>> are just $35 for now but how quickly can they become prohibitive
>>>>> for someone who does not sell millions of units.
>>>>
>>>> I never understood why FPGA vendors should charge for tools or use
>>>> insane licensing stuff. Makes more sense to just give it away, maybe
>>>> charge for support.
>>>>
>>>
>>> For many years - >20 - the electronica industry has been closing things
>>> down so only "politburo members" can do real development. Probably this
>>> is part of the same effort, FPGA vendors are interested in selling more
>>> chips but their large customers likely give them contracts against
>>> guarantees the tools will not be available to everybody.
>>
>> I'd bet it's an attempt to lock their customers in forever.
>
>Could be if it is a one time fee. Not sure what is in at the moment.
>But it started a long time ago so it is more likely to be the work
>of some 'visionary' to prevent the spread of knowledge which would
>cost them zillions. Look at how they closed down all things wifi,
>the first - prism or something - was documented etc. until it got
>bought out and hidden from there on. Even T10 started selling their
>documents many years ago... So far the rfc-s are not hidden, but for
>how long. Some Sauron seems to be be lurking in the shadows :-).

A common problem.

>> A have MS Word 2016. Now MS Updater nags me to convert to Word365,
>> which is only by subscription. Strangely, Word 2016 is now developing
>> problems.
>>
>>
>>> I wonder if the $35 tool one can buy now will work on a PC with
>>> no internet connection. Guess I have only one way to know for sure.
>>
>> Very good question. And companies who want to protect their critical
>> computers and networks from ransomware attacks et al may well have an
>> air-gapped system.
>
>I am not concerned about our design critical stuff, it is all under
>dps. They got a foot in when xilinx bought the coolrunner some 20 years
>ago, we had a logic compiler I had written; the cpld-s we have now
>use an old xilinx tool, old enough to work with no internet.

dps? Maybe Texas DPS?

>Guess I'll try some of these (too?) new fpga-s out, once I have a
>working logic as I need it I typically don't need to change it for
>many years. They seem new enough to be yet preoccupied with how
>to change one time sales into subscription, guess we'll see.
>Their fpga-s look really good on paper for what I am after.

I'd say that my system of the future is air-gapped, as it's too hard
to keep up with the threat of the day, so all Internet-dependent tools
are excluded from consideration, and see what happens. You may need
to stop talking to the sales droids to convince them that you mean it.

War story: In the early 1980s the transition to UNIX operating
systems and computer platforms began. I was assailed with sales teams
trying to convince me that their proprietary computer platform was so
much better than those UNIX toys that no real man would consider UNIX.
My answer was to take them on a tour of a storage room that was piled
to the ceiling with the boxes that a few hundred UNIX computers had
came in (being saved for delivery to the ultimate customer), and
intoning that this was the future. None of those proprietary vendors
survive.

Joe Gwinn

On 4/2/2022 23:50, Joe Gwinn wrote:
> On Sat, 2 Apr 2022 22:15:00 +0300, Dimiter_Popoff <dp@tgi-sci.com>
> wrote:
>
>> On 4/2/2022 21:51, Joe Gwinn wrote:
>>> On Sat, 2 Apr 2022 21:38:30 +0300, Dimiter_Popoff <dp@tgi-sci.com>
>>> wrote:
>>>
>>>> On 4/2/2022 20:47, John Larkin wrote:
>>>>> On Sat, 2 Apr 2022 20:33:11 +0300, Dimiter_Popoff <dp@tgi-sci.com>
>>>>> wrote:
>>>>>
>>>>>> On 4/2/2022 19:52, John Larkin wrote:
>>>>>>> On Sat, 2 Apr 2022 18:54:50 +0300, Dimiter_Popoff <dp@tgi-sci.com>
>>>>>>> wrote:
>>>>>>>
>>>>>>>> On 4/2/2022 1:37, John Larkin wrote:
>>>>>>>>> On 1 Apr 2022 22:28:41 GMT, Uwe Bonnes
>>>>>>>>> <bon@hertz.ikp.physik.tu-darmstadt.de> wrote:
>>>>>>>>>
>>>>>>>>>> John Larkin <jlarkin@highland_atwork_technology.com> wrote:
>>>>>>>>>>> We're designing a biggish dual power supply, and the customer wants
>>>>>>>>>>> remote sense. We'd add a small D9 connector or something for the four
>>>>>>>>>>> sense inputs.
>>>>>>>>>>>
>>>>>>>>>>> This seems non-trivial. The supply should work normally if the rs pins
>>>>>>>>>>> are not connected. We could put 50 ohm or somesuch resistors from the
>>>>>>>>>>> main outputs to the rs pins, and then drive a high-z feedback circuit.
>>>>>>>>>>>
>>>>>>>>>>> If the two supplies are paralleled, the customer would use just two
>>>>>>>>>>> sense wires.
>>>>>>>>>>>
>>>>>>>>>>> If rs is connected wrong, the supply can go bonkers or we could fry
>>>>>>>>>>> the 50 ohm resistors.
>>>>>>>>>>>
>>>>>>>>>>> Sounds like we need current limiters and maybe diodes and maybe FPGA
>>>>>>>>>>> logic.
>>>>>>>>>>>
>>>>>>>>>>
>>>>>>>>>> Why FPGA? Why not some uC?
>>>>>>>>>
>>>>>>>>> Every plugin board in this box has an FPGA. We need to do a lot of
>>>>>>>>> signal processing. The isolated ADCs are ADUM7703 delta-sigmas with a
>>>>>>>>> 20 MHz bit rate, which need a heap of decimation processing. We'll do
>>>>>>>>> some 100 Mbit communications with the motherboard too.
>>>>>>>>>
>>>>>>>>> The little Trion FPGAs are about $10. We could even run a riscV
>>>>>>>>> processor inside.
>>>>>>>>>
>>>>>>>>
>>>>>>>> Thanks for mentioning these Trion FPGA-s, they look very interesting
>>>>>>>> to me.
>>>>>>>> Do you have any impression on their software licensing? I saw they
>>>>>>>> sell it at $35 but does it turn into yet another subscription
>>>>>>>> after some time?
>>>>>>>
>>>>>>> I'll ask my FPGA guy. I get the impression that it's not bad.
>>>>>>>
>>>>>>> They look cool. They are simple, with no ADC or high-end serdes or
>>>>>>> things like that. They do have a dram controller (I think), lvds i/o,
>>>>>>> schmitts, and a soft core riscV. 1Mbit of sram.
>>>>>>>
>>>>>>> We're about to make a test board that includes the T20F256C4. We plan
>>>>>>> to measure a lot of stuff: pin-pin delays, Fmax on counters, LVDS
>>>>>>> common-mode levels, delay-vs-Vcore and temperature, jitter, drive
>>>>>>> strengths, things like that.
>>>>>>>
>>>>>>> We asked their support people about some details of using the LVDS
>>>>>>> receivers at other levels, and they said "don't do that."
>>>>>>>
>>>>>>> I might make an ADC using an LVDS receiver as a comparator. The
>>>>>>> minimal ADC would use three fpga pins and one external RC. That could
>>>>>>> be v-to-f, pwm, delta-sigma, or single-slope. Fun.
>>>>>>>
>>>>>>> We've designed a flash manager with bootstrap and field upgrade and
>>>>>>> such.
>>>>>>>
>>>>>>
>>>>>> I am only after standard functions, and if their lvds will do for
>>>>>> hdmi video out I'll be happy.
>>>>>> What I feel nervous about are their design tools, looks like they
>>>>>> are just $35 for now but how quickly can they become prohibitive
>>>>>> for someone who does not sell millions of units.
>>>>>
>>>>> I never understood why FPGA vendors should charge for tools or use
>>>>> insane licensing stuff. Makes more sense to just give it away, maybe
>>>>> charge for support.
>>>>>
>>>>
>>>> For many years - >20 - the electronica industry has been closing things
>>>> down so only "politburo members" can do real development. Probably this
>>>> is part of the same effort, FPGA vendors are interested in selling more
>>>> chips but their large customers likely give them contracts against
>>>> guarantees the tools will not be available to everybody.
>>>
>>> I'd bet it's an attempt to lock their customers in forever.
>>
>> Could be if it is a one time fee. Not sure what is in at the moment.
>> But it started a long time ago so it is more likely to be the work
>> of some 'visionary' to prevent the spread of knowledge which would
>> cost them zillions. Look at how they closed down all things wifi,
>> the first - prism or something - was documented etc. until it got
>> bought out and hidden from there on. Even T10 started selling their
>> documents many years ago... So far the rfc-s are not hidden, but for
>> how long. Some Sauron seems to be be lurking in the shadows :-).
>
> A common problem.
>
>
>>> A have MS Word 2016. Now MS Updater nags me to convert to Word365,
>>> which is only by subscription. Strangely, Word 2016 is now developing
>>> problems.
>>>
>>>
>>>> I wonder if the $35 tool one can buy now will work on a PC with
>>>> no internet connection. Guess I have only one way to know for sure.
>>>
>>> Very good question. And companies who want to protect their critical
>>> computers and networks from ransomware attacks et al may well have an
>>> air-gapped system.
>>
>> I am not concerned about our design critical stuff, it is all under
>> dps. They got a foot in when xilinx bought the coolrunner some 20 years
>> ago, we had a logic compiler I had written; the cpld-s we have now
>> use an old xilinx tool, old enough to work with no internet.
>
> dps? Maybe Texas DPS?

No, it is the OS run here, written/built on over the years by me.

Just did a shot of what my screen can look like (usually not as
cluttered):
http://tgi-sci.com/misc/dps.gif

>
>> Guess I'll try some of these (too?) new fpga-s out, once I have a
>> working logic as I need it I typically don't need to change it for
>> many years. They seem new enough to be yet preoccupied with how
>> to change one time sales into subscription, guess we'll see.
>> Their fpga-s look really good on paper for what I am after.
>
> I'd say that my system of the future is air-gapped, as it's too hard
> to keep up with the threat of the day, so all Internet-dependent tools
> are excluded from consideration, and see what happens. You may need
> to stop talking to the sales droids to convince them that you mean it.

I don't have the muscle to make them change policy so I try - have been
doing if for nearly 30 years now - to just be independent on software
written by anyone but me. The one thing in our products we cannot
reproduce without a wintel PC is a jedec file for a coolrunner CPLD,
xilinx would not disclose its insides (we had a tool for it while
it was Philips). Now I guess I'll settle for using someone else's
fpga tool... Once I have the binary and a supply of silicon - which
in our case it not large at all to be even a lifetime supply - I'll
still have things under control I guess.

On 3/4/22 2:52 am, John Larkin wrote:
> On Sat, 2 Apr 2022 18:54:50 +0300, Dimiter_Popoff <dp@tgi-sci.com>
> wrote:
>> On 4/2/2022 1:37, John Larkin wrote:
>>> The little Trion FPGAs are about $10. We could even run a riscV
>>> processor inside.
>> Thanks for mentioning these Trion FPGA-s, they look very interesting
>> to me.
>> Do you have any impression on their software licensing? I saw they
>> sell it at $35 but does it turn into yet another subscription
>> after some time?
>
> I'll ask my FPGA guy. I get the impression that it's not bad.
>
> They look cool. They are simple, with no ADC or high-end serdes or
> things like that. They do have a dram controller (I think), lvds i/o,
> schmitts, and a soft core riscV. 1Mbit of sram.
Just be aware that the trade-off with these i,s yes they are cheap and
low-power, but they're that way because they don't run enough mask
layers to provide much interconnect. The tools use LUTs for routing when
they run out of very limited interconnect, and whether that consumes an
unreasonable proportion of the chip depends on your signal flow and
floor planning.

CH

On Saturday, April 2, 2022 at 7:53:47 AM UTC-7, jla...@highlandsniptechnology.com wrote:

> Remote sense power supplies are common. People seem to use them OK. I
> don't know if rs power supplies have any sorts of protections against
> wiring errors. I think some just have 50 ohm resistors from outputs to
> the sense pins. I posted to see what people know about that.

If a dim customer doesn't connect the sense pins, the feedback still happens, with
a 50 ohm in the supply side, from sense(+) to V+ etc. It also works if sense wire breaks.

And, if the 50 ohm is in series with sense(+) between the sense wire and the
feedback node, it keeps high power currents out of the skinny sense wire if
the power wire breaks.

The first scenario is implied in some application literature. The second, I saw
in my car some years back...

On 1 Apr 2022 22:28:41 GMT, Uwe Bonnes
<bon@hertz.ikp.physik.tu-darmstadt.de> wrote:

>John Larkin <jlarkin@highland_atwork_technology.com> wrote:
>> We're designing a biggish dual power supply, and the customer wants
>> remote sense. We'd add a small D9 connector or something for the four
>> sense inputs.
>>
>> This seems non-trivial. The supply should work normally if the rs pins
>> are not connected. We could put 50 ohm or somesuch resistors from the
>> main outputs to the rs pins, and then drive a high-z feedback circuit.
>>
>> If the two supplies are paralleled, the customer would use just two
>> sense wires.
>>
>> If rs is connected wrong, the supply can go bonkers or we could fry
>> the 50 ohm resistors.
>>
>> Sounds like we need current limiters and maybe diodes and maybe FPGA
>> logic.
>>
>
>Why FPGA? Why not some uC?

In my experience, any microcontroller attached to or running
on externally accessible sense line juice will more likely
fail on standard single-fault abnormals. They don't like pins
being pulled above or below their own supply rails, or vice
versa.

ie will need replacing/reprogramming, vs just recycle the
source power, external or timed reset.

RL

On Friday, 1 April 2022 at 21:38:52 UTC+1, John Larkin wrote:
> We're designing a biggish dual power supply, and the customer wants
> remote sense. We'd add a small D9 connector or something for the four
> sense inputs.
>
> This seems non-trivial. The supply should work normally if the rs pins
> are not connected. We could put 50 ohm or somesuch resistors from the
> main outputs to the rs pins, and then drive a high-z feedback circuit.
>
> If the two supplies are paralleled, the customer would use just two
> sense wires.
>
> If rs is connected wrong, the supply can go bonkers or we could fry
> the 50 ohm resistors.
>
> Sounds like we need current limiters and maybe diodes and maybe FPGA
> logic.
>
> --
>
> If a man will begin with certainties, he shall end with doubts,
> but if he will be content to begin with doubts he shall end in certainties.
> Francis Bacon
Hi John,
it's not clear the setup to me, could you draw the configuration please? I'll be more than happy to have a look for you.

KR Francesco.
www.neutronix.co.uk

legg <legg@nospam.magma.ca> wrote:
> In my experience, any microcontroller attached to or running
> on externally accessible sense line juice will more likely
> fail on standard single-fault abnormals. They don't like pins
> being pulled above or below their own supply rails, or vice
> versa.
>
And you think FPGA pins are more robust?
--
Uwe Bonnes bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt
--------- Tel. 06151 1623569 ------- Fax. 06151 1623305 ---------

On Sun, 3 Apr 2022 09:34:57 -0700 (PDT), Neutronix Ltd
<francescopoderico@googlemail.com> wrote:

>On Friday, 1 April 2022 at 21:38:52 UTC+1, John Larkin wrote:
>> We're designing a biggish dual power supply, and the customer wants
>> remote sense. We'd add a small D9 connector or something for the four
>> sense inputs.
>>
>> This seems non-trivial. The supply should work normally if the rs pins
>> are not connected. We could put 50 ohm or somesuch resistors from the
>> main outputs to the rs pins, and then drive a high-z feedback circuit.
>>
>> If the two supplies are paralleled, the customer would use just two
>> sense wires.
>>
>> If rs is connected wrong, the supply can go bonkers or we could fry
>> the 50 ohm resistors.
>>
>> Sounds like we need current limiters and maybe diodes and maybe FPGA
>> logic.
>>
>> --
>>
>> If a man will begin with certainties, he shall end with doubts,
>> but if he will be content to begin with doubts he shall end in certainties.
>> Francis Bacon
>Hi John,
>it's not clear the setup to me, could you draw the configuration please? I'll be more than happy to have a look for you.
>
>KR Francesco.
>www.neutronix.co.uk

Something like this:

https://www.dropbox.com/s/z7v8q4tjnef1ahs/P941_Rem_Sense_3.jpg?raw=1

There will be two isolated power supplies on a plugin board, maybe 40
volts 6 amps each, optionally parallelable.

This remote sense scheme should allow for miswiring without blowing up
the resistors, because we will shut down fast if a remote sense
voltage gets too far from the corresponding output. Even if the
resistor frying thing were fixed some other way, the shutdown is still
valuable.

The two ADCs are isolated delta-sigmas. They are expensive and need an
isolated power supply, so I only want two and want to have them share
power.

Paralleling supplies will get interesting.

I should move the discharge circuit to the left of the current shunt
so we don't measure it. Depletion fets or something.

Suggestions welcome.

--

I yam what I yam - Popeye