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devel / comp.lang.forth / Re: FPGA4th

SubjectAuthor
* FPGA4thJohn Hart
+* Re: FPGA4thJurgen Pitaske
|+* Re: FPGA4thA.T. Murray
||`- Re: FPGA4thBrian Fox
|+- Re: FPGA4thHugh Aguilar
|+* Re: FPGA4thJohn Hart
||`* Re: FPGA4thJurgen Pitaske
|| `* Re: FPGA4thJohn Hart
||  +* Re: FPGA4thJurgen Pitaske
||  |`* Re: FPGA4thJurgen Pitaske
||  | `* Re: FPGA4thLorem Ipsum
||  |  `* Re: FPGA4thJurgen Pitaske
||  |   `* Re: FPGA4thLorem Ipsum
||  |    `* Re: FPGA4thJurgen Pitaske
||  |     +- Re: FPGA4thJurgen Pitaske
||  |     `* Re: FPGA4thLorem Ipsum
||  |      `* Re: FPGA4thJurgen Pitaske
||  |       `* Re: FPGA4thLorem Ipsum
||  |        `* Re: FPGA4thJurgen Pitaske
||  |         `* Re: FPGA4thLorem Ipsum
||  |          `* Re: FPGA4thJurgen Pitaske
||  |           +* Re: FPGA4thJohn Hart
||  |           |+- Re: FPGA4thJurgen Pitaske
||  |           |`- Re: FPGA4thWayne morellini
||  |           `* Re: FPGA4thMyron Plichota
||  |            +- Re: FPGA4thJohn Hart
||  |            +* Re: FPGA4thLorem Ipsum
||  |            |`* Re: FPGA4thnone
||  |            | `* Re: FPGA4thLorem Ipsum
||  |            |  +- Re: FPGA4thJurgen Pitaske
||  |            |  `* Re: FPGA4thdxforth
||  |            |   `* Re: FPGA4thLorem Ipsum
||  |            |    `* Re: FPGA4thWayne morellini
||  |            |     `* Re: FPGA4thdxforth
||  |            |      `* Re: FPGA4thWayne morellini
||  |            |       `* Re: FPGA4thdxforth
||  |            |        `* Re: FPGA4thS
||  |            |         `* Re: FPGA4thdxforth
||  |            |          `* Re: FPGA4thS
||  |            |           `* Re: FPGA4thdxforth
||  |            |            `* Re: FPGA4thS 1
||  |            |             `* Re: FPGA4thdxforth
||  |            |              `* Re: FPGA4thS 1
||  |            |               `* Re: FPGA4thdxforth
||  |            |                `* Re: FPGA4thS
||  |            |                 `- Re: FPGA4thdxforth
||  |            +- Re: FPGA4thJurgen Pitaske
||  |            +- Re: FPGA4thWayne morellini
||  |            `- Re: FPGA4thWayne morellini
||  `- Re: FPGA4thnone
|`* Re: FPGA4thJohn Hart
| +* Re: FPGA4thJurgen Pitaske
| |`* Re: FPGA4thJohn Hart
| | `- Re: FPGA4thJurgen Pitaske
| +* Re: FPGA4thLorem Ipsum
| |`* Re: FPGA4thJohn Hart
| | +* Re: FPGA4thLorem Ipsum
| | |+* Re: FPGA4thJurgen Pitaske
| | ||`* Re: FPGA4thLorem Ipsum
| | || `- Re: FPGA4thJurgen Pitaske
| | |`- Re: FPGA4thJohn Hart
| | `* Re: FPGA4thHugh Aguilar
| |  +- Re: FPGA4thJurgen Pitaske
| |  +- Re: FPGA4thnone
| |  +- Re: FPGA4thS 1
| |  `* Re: FPGA4thJohn Hart
| |   +* Re: FPGA4thHugh Aguilar
| |   |`* Re: FPGA4thJurgen Pitaske
| |   | `* Re: FPGA4thJohn Hart
| |   |  +- Re: FPGA4thJurgen Pitaske
| |   |  +* Re: FPGA4thHugh Aguilar
| |   |  |`* Re: FPGA4thJurgen Pitaske
| |   |  | `* Re: FPGA4thJurgen Pitaske
| |   |  |  +* Re: FPGA4thJurgen Pitaske
| |   |  |  |`* Re: FPGA4thLorem Ipsum
| |   |  |  | `* Re: FPGA4thJurgen Pitaske
| |   |  |  |  `* Re: FPGA4thdxforth
| |   |  |  |   `- Re: FPGA4thJurgen Pitaske
| |   |  |  `- Re: FPGA4thJurgen Pitaske
| |   |  `* Re: FPGA4thHugh Aguilar
| |   |   +* Re: FPGA4thdxforth
| |   |   |`* Re: FPGA4thAnton Ertl
| |   |   | `* Re: FPGA4thdxforth
| |   |   |  `* Re: FPGA4thAnton Ertl
| |   |   |   `* Re: FPGA4thdxforth
| |   |   |    `- Re: FPGA4thJurgen Pitaske
| |   |   `- Re: FPGA4thdxforth
| |   +* Re: FPGA4thLorem Ipsum
| |   |`* Re: FPGA4thJohn Hart
| |   | `- Re: FPGA4thLorem Ipsum
| |   `* Re: FPGA4thHugh Aguilar
| |    `* Re: FPGA4thJurgen Pitaske
| |     `* Re: FPGA4thJohn Hart
| |      +- Re: FPGA4thLorem Ipsum
| |      `* Re: FPGA4thJurgen Pitaske
| |       `* Re: FPGA4thJohn Hart
| |        +- Re: FPGA4thJurgen Pitaske
| |        +* Re: FPGA4thJurgen Pitaske
| |        |`- Re: FPGA4thJohn Hart
| |        `* Re: FPGA4thHugh Aguilar
| |         `* Re: FPGA4thJurgen Pitaske
| `* Re: FPGA4thHugh Aguilar
`* Re: FPGA4thHugh Aguilar

Pages:123456
Re: FPGA4th

<170891cf-436a-44b4-94b3-34e12dd980fan@googlegroups.com>

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Subject: Re: FPGA4th
From: jpita...@gmail.com (Jurgen Pitaske)
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 by: Jurgen Pitaske - Mon, 25 Sep 2023 06:45 UTC

On Monday, 25 September 2023 at 00:44:58 UTC+1, Hugh Aguilar wrote:
> On Friday, September 22, 2023 at 5:52:41 PM UTC-7, John Hart wrote:
> > On Saturday, May 6, 2023 at 12:09:32 AM UTC-7, Jurgen Pitaske wrote:
> >
> > > Really looking forward to some more of your work.
> > We finally have a complete V file...
>
> John Hart accepts Juergen Pintaske as his peer! LOL
> That really says quite a lot about John Hart!
> > It would be in our best interest for Fpga4th to become an open source project
> > IF enough forth programers were interested in continuing its development.
> > Its based on an extension of Forth called 4thSets, which would also become
> > an open source project.
> Why is it in the best interests of Testra to make FPGA4TH and 4THSETS
> open-source? Is it because Testra's software is full of bugs and you hope
> that somebody will debug it for you?
>
> You aren't any good at programming!
> This is why you needed me to write MFX (assembler, simulator and
> Forth cross-compiler for the MiniForth) --- you weren't capable of writing this
> yourself, and your employeed Steve Brault wasn't capable either --- but you were
> also ashamed of the fact that you needed to hire outside help, so you refused
> to admit afterward that I had written MFX. The liar Tom Hart says:
> --------------------------------------------------------------
> [Hugh] had nothing to do with the processor itself,
> that was all designed by John Hart and Steve Brault.
> The PLD version was based upon our original Forth Engine done long before we ever ran across Hugh.
> --------------------------------------------------------------
> > Reality is an information process, set in motion and sustained by God for a purpose.
> > Understanding the purpose is more important than knowing anything about anything.
> John Hart is still pretending that he understands God's purpose! LOL
> John Hart doesn't know anything about anything --- he is an arrogant clown.

You find it all here,
all of the people that wanted to comment.

Please dump your shit elswhere.

Re: FPGA4th

<45925fb8-84e8-417e-9762-41b305fd5e25n@googlegroups.com>

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Subject: Re: FPGA4th
From: jpita...@gmail.com (Jurgen Pitaske)
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 by: Jurgen Pitaske - Mon, 25 Sep 2023 06:46 UTC

On Monday, 25 September 2023 at 07:45:12 UTC+1, Jurgen Pitaske wrote:
> On Monday, 25 September 2023 at 00:44:58 UTC+1, Hugh Aguilar wrote:
> > On Friday, September 22, 2023 at 5:52:41 PM UTC-7, John Hart wrote:
> > > On Saturday, May 6, 2023 at 12:09:32 AM UTC-7, Jurgen Pitaske wrote:
> > >
> > > > Really looking forward to some more of your work.
> > > We finally have a complete V file...
> >
> > John Hart accepts Juergen Pintaske as his peer! LOL
> > That really says quite a lot about John Hart!
> > > It would be in our best interest for Fpga4th to become an open source project
> > > IF enough forth programers were interested in continuing its development.
> > > Its based on an extension of Forth called 4thSets, which would also become
> > > an open source project.
> > Why is it in the best interests of Testra to make FPGA4TH and 4THSETS
> > open-source? Is it because Testra's software is full of bugs and you hope
> > that somebody will debug it for you?
> >
> > You aren't any good at programming!
> > This is why you needed me to write MFX (assembler, simulator and
> > Forth cross-compiler for the MiniForth) --- you weren't capable of writing this
> > yourself, and your employeed Steve Brault wasn't capable either --- but you were
> > also ashamed of the fact that you needed to hire outside help, so you refused
> > to admit afterward that I had written MFX. The liar Tom Hart says:
> > --------------------------------------------------------------
> > [Hugh] had nothing to do with the processor itself,
> > that was all designed by John Hart and Steve Brault.
> > The PLD version was based upon our original Forth Engine done long before we ever ran across Hugh.
> > --------------------------------------------------------------
> > > Reality is an information process, set in motion and sustained by God for a purpose.
> > > Understanding the purpose is more important than knowing anything about anything.
> > John Hart is still pretending that he understands God's purpose! LOL
> > John Hart doesn't know anything about anything --- he is an arrogant clown.
> You find it all here,
> all of the people that wanted to comment.
>
> Please dump your shit elswhere.

https://groups.google.com/g/comp.lang.forth/c/wydQr643gX0

Re: FPGA4th

<91df62ef-4ef7-47af-87bf-e8e1d677e440n@googlegroups.com>

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Subject: Re: FPGA4th
From: jem...@gmail.com (SpainHackForth)
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 by: SpainHackForth - Sat, 30 Sep 2023 10:40 UTC

John, after the hardship of going thought all the messages in this thread, I'm really interested in seen you work.

I was truing to look at the OP and make some sense of it, here is what I came up with for the following as an example:
1 1C >XBCS AD D - - H" DR_RRB_AC" ' EMU_DR_RRB_AC ' NOP SIMPLE-OP: DR_RRB_AC

1 1C: Parameter values of 1 1C can be understood as a single hex value 0x1C representing some kind of opcode or identifier for the operation.

>XBCS: This is likely a transformation or a command to convert the previous value.

AD D - -: These could be flags or additional parameters for the operation. They might indicate how the operation behaves, modifies data, or interacts with other parts of the system.

H" DR_RRB_AC": Looks like it's a label or identifier for the operation. It's named DR_RRB_AC and would be referenced elsewhere.

' EMU_DR_RRB_AC ': This is fetching the execution token (xt) of the word EMU_DR_RRB_AC. Possible a word for a subroutine or handler that gets called when the operation is executed.

NOP: No Opp.

SIMPLE-OP: DR_RRB_AC: This is the actual declaration of the operation. It's named DR_RRB_AC, and all the preceding parameters and values describe its behavior and properties.

Code Type: The type or category of the instruction.
src: Source operand (e.g., a register or memory location).
dst: Destination operand.
Dsrc and Ddst: Possibly deferred or delayed source and destination operands.
instr string: A human-readable string representation of the instruction.
emulation operation: This likely refers to how the instruction should be emulated. It could be used in a software emulator to mimic the behavior of the real hardware.
Register: They look allot like RISC Arm, so I based my self on that.

Here is my attempt to put this into some sort of verilog format:

// Define the registers and flags
reg [15:0] Treg; // 16-bit T register
reg [15:0] accumulator; // 16-bit accumulator
reg [15:0] data_reg; // 16-bit data register
....
reg carry_flag; // Carry flag
reg flag; // General flag
....

// Define the operations
always @(posedge clk) begin
case (operation_type)
`>XBCS`: begin
// Implement the >XBCS operation
// Example: data_reg = Treg + accumulator + carry_flag;
...
end

`>CS`: begin
// Implementw the >CS operation
...
end

`>MA`: begin
// Memory Addressing: Load the accumulator with the value at the memory address
accumulator = memory[address];
end

`AC>MA`: begin
// Memory Addressing: Store the accumulator value to the memory address
memory[address] = accumulator;
end

...

`TR>DR`: begin
// Move data from T register to data register ( assuming that is the meaning )
data_reg = Treg;
end

`AC>DR`: begin
// Move data from accumulator to data register
data_reg = accumulator;
end

`0>DR`: begin
// Set data register to 0
data_reg = 16'b0;
end

`AC_OR_TR>DR`: begin
// Logical OR between accumulator and T register, result to data register ( just making this up )
data_reg = accumulator | Treg;
end

`IF_CRY+JMP`: begin
// Conditional jump based on carry flag ( If that is correct )
if (carry_flag) begin
program_counter = jump_address;
end
end

...

// All the Ops form the code.

endcase
end

// Emulation functions
function EMU_TR>DR;
begin
// Emulate the TR>DR operation what ever that is.
...
end

function EMU_AC>DR;
begin
// Emulate the AC>DR operation what ever that is.
...
end

....

Re: FPGA4th

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Newsgroups: comp.lang.forth
Date: Sat, 23 Dec 2023 12:55:28 -0800 (PST)
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Subject: Re: FPGA4th
From: johnroge...@gmail.com (John Hart)
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 by: John Hart - Sat, 23 Dec 2023 20:55 UTC

On Friday, December 8, 2023 at 5:40:58 PM UTC-7, John Hart wrote:
> On Saturday, September 30, 2023 at 3:40:32 AM UTC-7, SpainHackForth wrote:
> > John, after the hardship of going thought all the messages in this thread, I'm really interested in seen you work.
> <clip>
> What was posted was a preliminary definition of the instruction set used by MFX to compile processor code.
> I was hoping it might help quench a flame war that's been going on far too long
> and start a discussion on the merits of a Forth based logic generation system, Fpga4th.
> Fpga4th is now operational.
> It converts hardware described by Sets of Forth and vendor library functions into Verilog code.
> It's optimized for LUTs, generates instruction control logic and outputs code for CARMAP,
> a simple system we've used for years to convert logic described by Forth into Verilog code.
> I've been using Fpga4th to design a 32bit Forth processor tailored for a FPGA and
> optimized for control applications (16axis Motion Brain) while the system was developed.
> Forth was the first forth generation computer language, and being extensible is perfect
> for a reconfigurable computer. The goal is to provide an open source platform that will
> allow small companies to customized automation products, something big companies
> are reluctant to do. They tend to work together to limit competition and optimize profits.
> Good FPGA development systems are quite expensive so their use on small low cost
> projects can't be justified.
> jrh

I received a notice Google Groups is shutting down.
Being able to post or read things the Regime doesn't like
IS DANGEROUS!.
So access to USENET must be limited and use discouraged.

Forth, by it's very nature, is OPEN SOURCE.
That's why Corporate America didn't embrace it, even though it was the first
and most practical computer language at the time, able to be rapidly adapted
to different and extensible processors. C, with its libraries and extensions, is
a powerful language that enables corporate managers to turn programmers
into commodities they can hire and fire at will, And C makes it easy to hide what
programs do after they're compiled; a win win win for large corporations and
a barrier that makes it more difficult for small business to compete; and near
impossible for people to understand exactly what technology their lives depend
on is doing.

Now Big Tech managers are throwing billions on AGI, using libraries 'programmers'
wrote to train AI system to do what their 'programmers' have been doing. If they
succeed, massive layoffs of those employees will follow and small business will
be in even dire straits. The way out of this trap is to empower people, re-enable the
formation of capital and provide small business with low cost platforms that are
easy to use so they can automate their production lines. Forth is the ideal language
for that task. What's been holding it back is the lack of a standard for re-usable code
and logic.

John

Reality is an information process, set in motion and sustained by God for a purpose.
Understanding the purpose is far more important than knowing anything about anything!

Re: FPGA4th

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https://www.novabbs.com/devel/article-flat.php?id=25580&group=comp.lang.forth#25580

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Subject: Re: FPGA4th
From: johnroge...@gmail.com (John Hart)
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 by: John Hart - Sun, 31 Dec 2023 22:09 UTC

On Saturday, December 23, 2023 at 1:55:30 PM UTC-7, John Hart wrote:
> On Friday, December 8, 2023 at 5:40:58 PM UTC-7, John Hart wrote:
> > On Saturday, September 30, 2023 at 3:40:32 AM UTC-7, SpainHackForth wrote:
> > > John, after the hardship of going thought all the messages in this thread, I'm really interested in seen you work.
> > <clip>
> Forth, by it's very nature, is OPEN SOURCE.

We have our first Race32 JED and I'm writing a simple test program to determine if
it's functioning.

Google is dropping support for Usenet so this post may only be visible on its server.

john

Reality is an information process, set in motion and sustained by God for a purpose.
Understanding the purpose is far more important than knowing anything about anything!

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